diff options
| author | Indrek Kruusa <indrek.kruusa@artecdesign.ee> | 2006-08-03 16:48:18 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2006-08-03 16:48:18 +0000 |
| commit | 8e3464109e47945b1a4d7e3dd0c6e291593de70a (patch) | |
| tree | 03493e297dc332c8c7613303eb874e12830e0a5a /targets | |
| parent | 8ad7c06535694959952b7d64a9649cb9534abd2a (diff) | |
Changelog:
* src/cpu/amd/model_lx/model_lx_init.c
L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h
more checked values
* src/northbridge/amd/lx/northbridge.c
L2 cache initialization added
cpubug() commented out
* src/northbridge/amd/lx/raminit.c
empty function sdram_set_registers() is in use, don't remove
* src/mainboard/artecgroup/dbe61/Config.lb
irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
irq assigned manually to NIC
* src/mainboard/artecgroup/dbe61/Options.lb
gcc 4.0 is OK
* targets/artecgroup/dbe61/Config.lb
64K for VSA is OK at moment
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Andrei Birjukov <andrei.birjukov@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
| -rw-r--r-- | targets/artecgroup/dbe61/Config.lb | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/targets/artecgroup/dbe61/Config.lb b/targets/artecgroup/dbe61/Config.lb index bc56000ec8..1bbe5f1f98 100644 --- a/targets/artecgroup/dbe61/Config.lb +++ b/targets/artecgroup/dbe61/Config.lb @@ -1,11 +1,11 @@ -# Config file for the olpc rev_a +# Config file for the ThinCan dbe61 target dbe61 mainboard artecgroup/dbe61 -# leave 128k for vsa +# leave 64k for vsa option CONFIG_COMPRESSED_ROM_STREAM=0 -option ROM_SIZE=1024*256-128*1024 +option ROM_SIZE=1024*256-64*1024 option FALLBACK_SIZE=ROM_SIZE option DEFAULT_CONSOLE_LOGLEVEL = 11 |