diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2008-01-18 15:08:58 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2008-01-18 15:08:58 +0000 |
| commit | f8ee1806ac524bc782c93eccc59ee3c929abddb9 (patch) | |
| tree | 7daab6b3aa82476a10d38fbf68068f4a409d2ce9 /targets/totalimpact/briq | |
| parent | 7e61e45402aba2b90997f4f02ca8266cf65a229a (diff) | |
Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/totalimpact/briq')
| -rw-r--r-- | targets/totalimpact/briq/Config.lb | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/targets/totalimpact/briq/Config.lb b/targets/totalimpact/briq/Config.lb index 08890634a4..92288234fe 100644 --- a/targets/totalimpact/briq/Config.lb +++ b/targets/totalimpact/briq/Config.lb @@ -42,11 +42,11 @@ romimage "normal" ## Exception vectors (other than reset vector) option _EXCEPTION_VECTORS=_RESET+0x100 - ## Start of linuxBIOS in the boot rom + ## Start of coreboot in the boot rom ## = _RESET + exeception vector table size option _ROMSTART=_RESET+0x3100 - ## LinuxBIOS C code runs at this location in RAM + ## Coreboot C code runs at this location in RAM option _RAMBASE=0x00100000 option _RAMSTART=0x00100000 @@ -55,4 +55,4 @@ romimage "normal" end -buildrom ./linuxbios.rom ROM_SIZE "normal" +buildrom ./coreboot.rom ROM_SIZE "normal" |