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authorJulian Schroeder <julianmarcusschroeder@gmail.com>2021-07-20 15:08:44 -0500
committerFelix Held <felix-coreboot@felixheld.de>2021-09-20 12:56:21 +0000
commitf9080ce6d9eeb3e8622500a0ef9b852a2d0727bc (patch)
tree37bea2a2505d1d345549dab043036aa0baaf3ad5 /src
parentd453208623bf17a9069c67c29b2ae7dc10f756dd (diff)
soc/amd/cezanna/acpi/mmio.asl: enable ACPI AOAC for I2C
This enables runtime power management for the I2C controllers. BUG=b:182556027, b:183983959 TEST=enable dynamic debug in kernel and check i2c D3/D0 transitions during suspend_stress_test. Change-Id: Ia6b9ca95d751f32b7cd701494377f15091c22d2f Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56462 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/cezanne/acpi/mmio.asl12
1 files changed, 4 insertions, 8 deletions
diff --git a/src/soc/amd/cezanne/acpi/mmio.asl b/src/soc/amd/cezanne/acpi/mmio.asl
index e00120afd9..9e587b75f1 100644
--- a/src/soc/amd/cezanne/acpi/mmio.asl
+++ b/src/soc/amd/cezanne/acpi/mmio.asl
@@ -155,8 +155,7 @@ Device (I2C0) {
Return (0x0F)
}
- // TODO(b/183983959): Enable the AOAC register access later.
- // AOAC_DEVICE(FCH_AOAC_DEV_I2C0, 0)
+ AOAC_DEVICE(FCH_AOAC_DEV_I2C0, 0)
}
Device (I2C1) {
@@ -192,8 +191,7 @@ Device (I2C1) {
Return (0x0F)
}
- // TODO(b/183983959): Enable the AOAC register access later.
- // AOAC_DEVICE(FCH_AOAC_DEV_I2C1, 0)
+ AOAC_DEVICE(FCH_AOAC_DEV_I2C1, 0)
}
Device (I2C2) {
@@ -229,8 +227,7 @@ Device (I2C2) {
Return (0x0F)
}
- // TODO(b/183983959): Enable the AOAC register access later.
- // AOAC_DEVICE(FCH_AOAC_DEV_I2C2, 0)
+ AOAC_DEVICE(FCH_AOAC_DEV_I2C2, 0)
}
Device (I2C3)
@@ -266,8 +263,7 @@ Device (I2C3)
Return (0x0F)
}
- // TODO(b/183983959): Enable the AOAC register access later.
- // AOAC_DEVICE(FCH_AOAC_DEV_I2C3, 0)
+ AOAC_DEVICE(FCH_AOAC_DEV_I2C3, 0)
}
Device (MISC)