diff options
| author | Jamie Ryu <jamie.m.ryu@intel.com> | 2024-10-14 22:26:57 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-10-21 07:49:04 +0000 |
| commit | 0d7685e116f0ad4440390aed605c9f372b9b547a (patch) | |
| tree | efa00726119e9ecd4c80a43894a0272595c17d05 /src | |
| parent | 4ef7c4602bf30fe898bdad28f47d44492776766e (diff) | |
mb/google/fatcat: Disable C1 state auto-demotion for ES SoC
This disables C1 state auto-demotion to run the coreboot with
Panther Lake ES SoC without an issue.
This configuration will be remove later once the related features
are fully verified.
BUG=b:373915085
TEST=Build fatcat and check the platform boots without an issue.
Change-Id: I384dba2918cfd04deb90284513c204fa8c21094b
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84767
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb index f73cae1f14..01bb2d81b2 100644 --- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb +++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb @@ -33,6 +33,10 @@ chip soc/intel/pantherlake # DPTF enable register "dptf_enable" = "false" + # TODO: Safe Setting. Needs to be removed later + # Disable C1 C-state auto-demotion + register "disable_c1_state_auto_demotion" = "true" + # Enable CNVi BT register "cnvi_bt_core" = "true" |