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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-14 21:58:03 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-15 20:05:49 +0000
commita30ad9faf9ea15fa84eaf4f72d38a1952828ef85 (patch)
treeccb1feda8840da6abe495aec7380ccc6e8c2e061 /src
parent718a3cba252b39068d8bccd988d602065ad4ca65 (diff)
mb/google/guybrush/bootblock: add comment about LPC_LDRQ0_PU,PD_EN
The definition of those bits changed between Picasso and Renoir/Cezanne so add a comment where those bit definitions are used as well. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: If1cf4b06fc35f94cbd482f2869fcc64739e7d272 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58345 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/guybrush/bootblock.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/bootblock.c b/src/mainboard/google/guybrush/bootblock.c
index 4a0d384660..83ac43ac41 100644
--- a/src/mainboard/google/guybrush/bootblock.c
+++ b/src/mainboard/google/guybrush/bootblock.c
@@ -34,6 +34,8 @@ void bootblock_mainboard_early_init(void)
size_t base_num_gpios, override_num_gpios;
const struct soc_amd_gpio *base_gpios, *override_gpios;
+ /* Beware that the bit definitions for LPC_LDRQ0_PU_EN and LPC_LDRQ0_PD_EN are swapped
+ on Picasso and older compared to Renoir/Cezanne and newer */
dword = pci_read_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS);
dword &= ~(LPC_LDRQ0_PU_EN | LPC_LDRQ1_EN | LPC_LDRQ0_EN);
dword |= LPC_LDRQ0_PD_EN;