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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-10-21 17:38:23 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-10-28 22:06:41 +0000 |
| commit | 9dc9ef3082714b98ed14f37d6e82f96b02ef5946 (patch) | |
| tree | d8e3765f3ca293d8b40245b57c7ba1d0b4f39b62 /src | |
| parent | 485f51cf73c13a25a9b41b5c2c0e4498a4df2764 (diff) | |
uncore_acpi: Clean up resource code
Use the resource size to determine Vtd BAR size and drop the code to
calculate the Vtd BAR size.
While on it do not truncate the resource address to 32-bit, since the
DMAR entry is 64-bit wide anyway.
TEST: Booted on intel/archercity_crb
Change-Id: Ibaadc25c44345ba2eb9e6f75989d32b43d00d7a5
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/xeon_sp/uncore_acpi.c | 18 |
1 files changed, 7 insertions, 11 deletions
diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c index fc283ee50d..099b235614 100644 --- a/src/soc/intel/xeon_sp/uncore_acpi.c +++ b/src/soc/intel/xeon_sp/uncore_acpi.c @@ -251,11 +251,7 @@ static unsigned long acpi_create_drhd(unsigned long current, struct device *iomm struct resource *resource; resource = probe_resource(iommu, VTD_BAR_CSR); - if (!resource) - return current; - - uint32_t reg_base = resource->base; - if (!reg_base) + if (!resource || !resource->base || !resource->size) return current; const uint32_t bus = iommu->upstream->secondary; @@ -263,8 +259,8 @@ static unsigned long acpi_create_drhd(unsigned long current, struct device *iomm int socket = iio_pci_domain_socket_from_dev(iommu); int stack = iio_pci_domain_stack_from_dev(iommu); - printk(BIOS_SPEW, "%s socket: %d, stack: %d, bus: 0x%x, pcie_seg: 0x%x, reg_base: 0x%x\n", - __func__, socket, stack, bus, pcie_seg, reg_base); + printk(BIOS_SPEW, "%s socket: %d, stack: %d, bus: 0x%x, pcie_seg: 0x%x, reg_base: 0x%llx\n", + __func__, socket, stack, bus, pcie_seg, resource->base); /* * Add DRHD Hardware Unit @@ -276,10 +272,10 @@ static unsigned long acpi_create_drhd(unsigned long current, struct device *iomm DRHD_INCLUDE_PCI_ALL : 0; printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, " - "Register Base Address: 0x%x\n", - flags, pcie_seg, reg_base); - current += acpi_create_dmar_drhd(current, flags, - pcie_seg, reg_base, vtd_probe_bar_size(iommu)); + "Register Base Address: 0x%llx\n", + flags, pcie_seg, resource->base); + current += acpi_create_dmar_drhd(current, flags, pcie_seg, resource->base, + resource->size); // Add IOAPIC if (is_dev_on_domain0(iommu)) { |