diff options
author | Yidi Lin <yidilin@chromium.org> | 2024-10-15 17:14:58 +0800 |
---|---|---|
committer | Yu-Ping Wu <yupingso@google.com> | 2024-10-23 06:36:01 +0000 |
commit | 573cc4a27af0dc6c537dc46a741a9178d913a8ef (patch) | |
tree | 98776985797250b6f65ff6a03ed62ce258c0bb54 /src | |
parent | ba4d2ec8c5b00b3c228c3f5ec67c5d789619bc28 (diff) |
soc/mediatek/common: Add more definitions for SPMI
The newly added enums and struct members will be used by MT8196.
BUG=none
TEST=emerge-corsola coreboot; emerge-geralt coreboot
Change-Id: I32e758cc4244114073606c418a69e0467cdf1039
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84773
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/mediatek/common/include/soc/pmif_spmi.h | 7 | ||||
-rw-r--r-- | src/soc/mediatek/common/include/soc/spmi.h | 27 |
2 files changed, 31 insertions, 3 deletions
diff --git a/src/soc/mediatek/common/include/soc/pmif_spmi.h b/src/soc/mediatek/common/include/soc/pmif_spmi.h index d970e590e0..f62e3439b7 100644 --- a/src/soc/mediatek/common/include/soc/pmif_spmi.h +++ b/src/soc/mediatek/common/include/soc/pmif_spmi.h @@ -16,8 +16,14 @@ struct mtk_rgu_regs { u32 reserved[36]; u32 wdt_swsysrst2; + u32 reserved1[91]; + u32 wdt_vlp_swsysrst0; + u32 reserved2[3]; + u32 wdt_vlp_swsysrst1; }; check_member(mtk_rgu_regs, wdt_swsysrst2, 0x90); +check_member(mtk_rgu_regs, wdt_vlp_swsysrst0, 0x200); +check_member(mtk_rgu_regs, wdt_vlp_swsysrst1, 0x210); struct mtk_spmi_mst_reg { u32 op_st_ctrl; @@ -51,6 +57,7 @@ struct cali { enum { SPMI_CK_NO_DLY = 0, SPMI_CK_DLY_1T, + SPMI_CK_DLY_2T, }; enum { diff --git a/src/soc/mediatek/common/include/soc/spmi.h b/src/soc/mediatek/common/include/soc/spmi.h index 6d6d4a7df8..84ac52e8da 100644 --- a/src/soc/mediatek/common/include/soc/spmi.h +++ b/src/soc/mediatek/common/include/soc/spmi.h @@ -35,18 +35,39 @@ enum spmi_slave { enum slv_type { BUCK_CPU, BUCK_GPU, + BUCK_MD, + BUCK_RF, + MAIN_PMIC, + BUCK_VPU, + SUB_PMIC, + CLOCK_PMIC, + SECOND_PMIC, + BUCK_APU, SLV_TYPE_MAX, }; enum slv_type_id { - BUCK_CPU_ID, - BUCK_GPU_ID, + BUCK_RF_ID = 1, + BUCK_MD_ID = 3, + MAIN_PMIC_ID = 5, + BUCK_CPU_ID = 6, + BUCK_GPU_ID = 7, + BUCK_VPU_ID = 8, + BUCK_APU_ID = 9, + SUB_PMIC_ID = 10, + CLOCK_PMIC_ID = 11, + SECOND_PMIC_ID = 12, SLV_TYPE_ID_MAX, }; struct spmi_device { - u32 slvid; + enum spmi_slave slvid; + enum spmi_master mstid; enum slv_type type; enum slv_type_id type_id; + u16 hwcid_addr; + u8 hwcid_val; + u8 hwcid_mask; }; + #endif /* __SOC_MEDIATEK_SPMI_H__ */ |