diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-16 19:56:40 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-18 13:45:34 +0000 |
| commit | bd74aaf534e46a38e50a2db03df58b28cae8ed96 (patch) | |
| tree | fee04300dde0226695207a92952749ce61ba77c2 /src | |
| parent | ade13f03e1381d315beb28ae029905e7a2d5aa0a (diff) | |
mb/foxconn/g41m: Fix overridetree
The .chip_info field of PNP devices in overridetree
incorrectly pointed to southbridge config structure
in generated static.c files.
Change-Id: If507c8ea9c865ff86e127226b93a8579bcf39d8d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb index 45ae89730e..96e11e3d5e 100644 --- a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb +++ b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb @@ -3,13 +3,15 @@ chip northbridge/intel/x4x # Northbridge subsystemid 0x105b 0x0dc0 inherit chip southbridge/intel/i82801gx # Southbridge device pci 1f.0 on # ISA bridge - device pnp 2e.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 + chip superio/ite/it8720f # Super I/O + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.2 off end # COM2 (IR) + device pnp 2e.a off end # CIR end - device pnp 2e.2 off end # COM2 (IR) - device pnp 2e.a off end # CIR end device pci 1f.1 on end # PATA/IDE end |