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authorMichał Żygowski <michal.zygowski@3mdeb.com>2020-02-07 18:39:24 +0100
committerMichał Żygowski <michal.zygowski@3mdeb.com>2020-03-23 13:32:13 +0000
commit09eb8d0c9b3b9e7b765520114d148a19926ff886 (patch)
tree42fb3d50df77d9a6c7fb54f833dc6b3db691143f /src
parentece6b2fc8a7f22716d47ae4f26742d54d0b655c9 (diff)
nb/amd/{agesa,pi}/acpi: include thermal zone
According to BKDGs these northbridges should support the K10 compatible temperature sensors. TEST=boot FreeBSD on PC Engines apu2 and check the thermal zone temperature using sysctl Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Icbdf44508085964452d74e084b133f1baa39e1a8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38755 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/pi/00630F01/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/pi/00730F01/acpi/northbridge.asl5
4 files changed, 20 insertions, 0 deletions
diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
index ce3715e4c1..40df8918b1 100644
--- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
@@ -92,3 +92,8 @@ Device(PBR7) {
Return (PS7) /* PIC Mode */
} /* end _PRT */
} /* end PBR7 */
+
+Device(K10M) {
+ Name (_ADR, 0x00180003)
+ #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+}
diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
index cdfab58b04..34bf33a32e 100644
--- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
@@ -92,3 +92,8 @@ Device(PBR8) {
Return (PS8) /* PIC Mode */
} /* end _PRT */
} /* end PBR8 */
+
+Device(K10M) {
+ Name (_ADR, 0x00180003)
+ #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+}
diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
index 621efb526b..cdb4063d36 100644
--- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
@@ -62,3 +62,8 @@ Device(PBR3) {
Return (PS3) /* PIC Mode */
} /* end _PRT */
} /* end PBR3 */
+
+Device(K10M) {
+ Name (_ADR, 0x00180003)
+ #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+}
diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
index cdfab58b04..34bf33a32e 100644
--- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
@@ -92,3 +92,8 @@ Device(PBR8) {
Return (PS8) /* PIC Mode */
} /* end _PRT */
} /* end PBR8 */
+
+Device(K10M) {
+ Name (_ADR, 0x00180003)
+ #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+}