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authorJonathan Kollasch <jakllsch@kollasch.net>2010-11-21 22:55:46 +0000
committerJonathan A. Kollasch <jakllsch@kollasch.net>2010-11-21 22:55:46 +0000
commitfae0d6c12bc3ad112b948cffbe7d085e6afd5fc6 (patch)
treed505442ea5f2c4ced9d8622024fa72cc87667860 /src
parent7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (diff)
Move CK804_PCI_E_X and CK804B_PCI_E_X defines (which have been 4 by
default on all boards) into Kconfig. Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/nvidia/ck804/Kconfig26
-rw-r--r--src/southbridge/nvidia/ck804/ck804_early_setup.c16
-rw-r--r--src/southbridge/nvidia/ck804/ck804_early_setup_car.c17
3 files changed, 31 insertions, 28 deletions
diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig
index ef044a6b36..6c93dfc2cf 100644
--- a/src/southbridge/nvidia/ck804/Kconfig
+++ b/src/southbridge/nvidia/ck804/Kconfig
@@ -5,30 +5,42 @@ config SOUTHBRIDGE_NVIDIA_CK804
select IOAPIC
select TINY_BOOTBLOCK
+if SOUTHBRIDGE_NVIDIA_CK804
+
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
- default "southbridge/nvidia/ck804/bootblock.c" if SOUTHBRIDGE_NVIDIA_CK804
+ default "southbridge/nvidia/ck804/bootblock.c"
config ID_SECTION_OFFSET
hex
- default 0x80 if SOUTHBRIDGE_NVIDIA_CK804
+ default 0x80
config EHCI_BAR
hex
- default 0xfef00000 if SOUTHBRIDGE_NVIDIA_CK804
+ default 0xfef00000
config EHCI_DEBUG_OFFSET
hex
- default 0x98 if SOUTHBRIDGE_NVIDIA_CK804
+ default 0x98
config CK804_USE_NIC
bool
- default n if SOUTHBRIDGE_NVIDIA_CK804
+ default n
config CK804_USE_ACI
bool
- default n if SOUTHBRIDGE_NVIDIA_CK804
+ default n
+
+config CK804_PCI_E_X
+ int
+ default 4
+
+config CK804B_PCI_E_X
+ int
+ default 4
config CK804_NUM
int
- default 1 if SOUTHBRIDGE_NVIDIA_CK804
+ default 1
+
+endif
diff --git a/src/southbridge/nvidia/ck804/ck804_early_setup.c b/src/southbridge/nvidia/ck804/ck804_early_setup.c
index b73c735e49..53d35feecc 100644
--- a/src/southbridge/nvidia/ck804/ck804_early_setup.c
+++ b/src/southbridge/nvidia/ck804/ck804_early_setup.c
@@ -56,16 +56,15 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control,
#define SYSCTRL_REG_POS 0x64
/*
+ * Values for CONFIG_CK804_PCI_E_X and CONFIG_CK804B_PCI_E_X.
+ * Apparently some sort of lane configuration.
+ *
* 16 1 1 2 :0
* 8 8 2 2 :1
* 8 8 4 :2
* 8 4 4 4 :3
* 16 4 :4
-*/
-
-#ifndef CK804_PCI_E_X
-#define CK804_PCI_E_X 4
-#endif
+ */
#if CONFIG_CK804_NUM > 1
#define CK804B_ANACTRL_IO_BASE (ANACTRL_IO_BASE + 0x8000)
@@ -73,9 +72,6 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control,
#ifndef CK804B_BUSN
#define CK804B_BUSN 0x80
#endif
-#ifndef CK804B_PCI_E_X
-#define CK804B_PCI_E_X 4
-#endif
#endif
#define CK804_CHIP_REV 3
@@ -258,9 +254,9 @@ static void ck804_early_setup(void)
RES_PORT_IO_32, ANACTRL_IO_BASE + 0x80, ~(1 << 3), 0x00000000,
- RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CK804_PCI_E_X << 4) | (1 << 8),
+ RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CONFIG_CK804_PCI_E_X << 4) | (1 << 8),
#if CONFIG_CK804_NUM > 1
- RES_PORT_IO_32, CK804B_ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CK804B_PCI_E_X << 4) | (1 << 8),
+ RES_PORT_IO_32, CK804B_ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CONFIG_CK804B_PCI_E_X << 4) | (1 << 8),
#endif
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 8, ~(0xff), ((0 << 4) | (0 << 2) | (0 << 0)),
diff --git a/src/southbridge/nvidia/ck804/ck804_early_setup_car.c b/src/southbridge/nvidia/ck804/ck804_early_setup_car.c
index 2df9545dd9..23a83ff400 100644
--- a/src/southbridge/nvidia/ck804/ck804_early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/ck804_early_setup_car.c
@@ -54,20 +54,15 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control,
#define SYSCTRL_REG_POS 0x64
/*
+ * Values for CONFIG_CK804_PCI_E_X and CONFIG_CK804B_PCI_E_X.
+ * Apparently some sort of lane configuration.
+ *
* 16 1 1 2 :0
* 8 8 2 2 :1
* 8 8 4 :2
* 8 4 4 4 :3
* 16 4 :4
-*/
-
-#ifndef CK804_PCI_E_X
-#define CK804_PCI_E_X 4
-#endif
-
-#ifndef CK804B_PCI_E_X
-#define CK804B_PCI_E_X 4
-#endif
+ */
#define CK804_CHIP_REV 3
@@ -199,7 +194,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
RES_PORT_IO_32, ANACTRL_IO_BASE + 0x80, ~(1 << 3), 0x00000000,
- RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CK804_PCI_E_X << 4) | (1 << 8),
+ RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CONFIG_CK804_PCI_E_X << 4) | (1 << 8),
//SYSCTRL
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 8, ~(0xff), ((0 << 4) | (0 << 2) | (0 << 0)),
@@ -275,7 +270,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
/* This line doesn't exist in the non-CAR version. */
RES_PORT_IO_32, ANACTRL_IO_BASE + 0x80, ~(1 << 3), 0x00000000,
- RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CK804B_PCI_E_X << 4) | (1 << 8),
+ RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CONFIG_CK804B_PCI_E_X << 4) | (1 << 8),
#if CONFIG_CK804_USE_NIC
RES_PCI_IO, PCI_ADDR(0, 0xa, 0, 0xf8), 0xffffffbf, 0x00000040,