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authorStefan Reinauer <reinauer@chromium.org>2012-06-11 15:38:15 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-07-24 19:53:13 +0200
commit6097e193fc708942931fd60ad40d40e95550ecb0 (patch)
tree4d20e002bef9beeb0e64ceae79e5ea850c8e66bd /src
parent3a8cad3c146265ec614ac8623cf6db94d0ab2ed3 (diff)
Make ACPI code detect Sandy/Ivy Bridge dynamically
On systems with socketed CPUs we want to be able to drop in a Sandy Bridge or Ivy Bridge CPU without recompiling the firmware. Hence, detect the north bridge dynamically. In order for this to work, we need Ivy Bridge MRC and coreboot configured for Ivy Bridge. Change-Id: I635bef2c61d47d36a3fdd87f8ecb6e69097ba969 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1281 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sandybridge/acpi.c4
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h8
2 files changed, 5 insertions, 7 deletions
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index d1174d6481..10b1a68af8 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -36,7 +36,9 @@ unsigned long acpi_fill_mcfg(unsigned long current)
u32 pciexbar_reg;
int max_buses;
- dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_NB, 0);
+ dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_SB, 0);
+ if (!dev)
+ dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_IB, 0);
if (!dev)
return current;
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 7e12416f46..f8617dee90 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -199,12 +199,8 @@ struct ied_header {
u8 reserved[34];
} __attribute__ ((packed));
-#if CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE
-#define PCI_DEVICE_ID_NB 0x0104
-#endif
-#if CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE
-#define PCI_DEVICE_ID_NB 0x0154
-#endif
+#define PCI_DEVICE_ID_SB 0x0104
+#define PCI_DEVICE_ID_IB 0x0154
#ifdef __SMM__
void intel_sandybridge_finalize_smm(void);