diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-07-31 14:22:53 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-03 08:06:00 +0000 |
| commit | 4c1b6b31c0e608d3f4d01947814f4edc9b69bdea (patch) | |
| tree | fe6dd6be41d18c6dfcf1d18203ed0dd4220ffcfd /src | |
| parent | 3638a52a6413b31f67105335dd93909473316287 (diff) | |
soc/intel/cannonlake: Report Whiskey Lake info
According to #574725, report Whiskey Lake CPUID, MCH device ID and
graphics device ID in bootblock stage.
BUG=N/A
TEST=Build and boot up whiskey lake rvp platform and check serial log to
see proper CPU/MCH/GFX/PCH got recognized.
Change-Id: I3fbc190e0520989d2fd4a9b3294e84d67e49b2cf
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/27756
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/report_platform.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 9d967cee68..2c6397d918 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -36,6 +36,7 @@ static struct { { CPUID_CANNONLAKE_B0, "Cannonlake B0" }, { CPUID_CANNONLAKE_C0, "Cannonlake C0" }, { CPUID_CANNONLAKE_D0, "Cannonlake D0" }, + { CPUID_WHISKEYLAKE_W0, "Whiskeylake W0" }, }; static struct { @@ -44,6 +45,7 @@ static struct { } mch_table[] = { { PCI_DEVICE_ID_INTEL_CNL_ID_U, "Cannonlake-U" }, { PCI_DEVICE_ID_INTEL_CNL_ID_Y, "Cannonlake-Y" }, + { PCI_DEVICE_ID_INTEL_WHL_ID_W, "Whiskeylake" }, }; static struct { @@ -67,6 +69,7 @@ static struct { { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2, "Cannonlake ULT GT1.5" }, { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" }, { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" }, + { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT1" }, }; static uint8_t get_dev_revision(pci_devfn_t dev) |