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authorFurquan Shaikh <furquan@google.com>2016-05-04 23:25:16 -0700
committerFurquan Shaikh <furquan@google.com>2016-05-09 05:01:58 +0200
commit94b18a1757e66c2e3094bd1116a88db36cbb4f79 (patch)
tree4c4686dfc4f7d70d7f4f74b7c06e8b40bed6edf0 /src
parent2e78aa5a78d67d8bd5ef90bb89d01fc82faadc8a (diff)
xip: Do not pass --xip for early stages if CAR supports code execution
On modern x86 platforms like apollolake, pre-RAM stages verstage and romstage run within the cache-as-ram region. Thus, we do not need to pass in the --xip parameter to cbfstool while adding these stages. Introduce a new Kconfig variable NO_XIP_EARLY_STAGES which is default false for all x86 platforms. Apollolake selects this option since it supports code execution with CAR. Change-Id: I2848046472f40f09ce7fc230c258b0389851b2ea Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14623 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/Kconfig8
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/vendorcode/google/chromeos/vboot2/Makefile.inc10
3 files changed, 17 insertions, 2 deletions
diff --git a/src/Kconfig b/src/Kconfig
index f9bd661e05..b56f01070f 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -199,6 +199,14 @@ config INCLUDE_CONFIG_FILE
config 0x8d740 raw 3324
(empty) 0x8e480 null 3610440
+config NO_XIP_EARLY_STAGES
+ bool
+ default n if ARCH_X86
+ default y
+ help
+ Identify if --xip parameter needs to be passed into cbfstool for early
+ stages.
+
config EARLY_CBMEM_INIT
def_bool !LATE_CBMEM_INIT
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index d52d592d07..d6d4d1f86d 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select NO_FIXED_XIP_ROM_SIZE
+ select NO_XIP_EARLY_STAGES
select PARALLEL_MP
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
index f9348842a2..b0a3c125ab 100644
--- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc
+++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
@@ -76,9 +76,15 @@ cbfs-files-$(CONFIG_SEPARATE_VERSTAGE) += $(CONFIG_CBFS_PREFIX)/verstage
$(CONFIG_CBFS_PREFIX)/verstage-file := $(objcbfs)/verstage.elf
$(CONFIG_CBFS_PREFIX)/verstage-type := stage
$(CONFIG_CBFS_PREFIX)/verstage-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
-# Verstage on x86 expected to be xip.
+
ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y)
-$(CONFIG_CBFS_PREFIX)/verstage-options := -a 64 --xip -S ".car.data"
+$(CONFIG_CBFS_PREFIX)/verstage-options := -a 64 -S ".car.data"
+
+# If CAR does not support execution of code, verstage on x86 is expected to be
+# xip.
+ifneq ($(CONFIG_NO_XIP_EARLY_STAGES),y)
+$(CONFIG_CBFS_PREFIX)/verstage-options += --xip
+endif
endif