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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-02 16:26:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-03-04 14:07:23 +0000
commit3e6913b389736ba38e104596871e0dac78c09beb (patch)
tree7130ccc77035e4c61711a093b5f42d9692ebafe5 /src
parente132d5711df1bec0a83eb9deb0f892bb22579df6 (diff)
arch/io.h: Fix PCI and PNP simple typedefs
Provide clean separation for PCI and PNP headers, followup will also move PNP outside <arch/io.h>. Change-Id: I85db254d50f18ea34a5e95bc517eac4085a5fafa Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31690 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/include/arch/io.h3
-rw-r--r--src/include/device/pci_ehci.h2
-rw-r--r--src/include/device/pci_ops.h1
-rw-r--r--src/include/device/pci_type.h1
-rw-r--r--src/include/reg_script.h2
-rw-r--r--src/northbridge/amd/amdfam10/pci.h1
6 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index aecf0b634c..98cb15a247 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -16,7 +16,6 @@
#include <endian.h>
#include <stdint.h>
-#include <device/pci_type.h>
/*
* This file contains the definitions for the x86 IO instructions
@@ -203,6 +202,8 @@ static __always_inline void write64(volatile void *addr,
}
#endif
+typedef u32 pnp_devfn_t;
+
#ifdef __SIMPLE_DEVICE__
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h
index 9d18bcc798..146946ce75 100644
--- a/src/include/device/pci_ehci.h
+++ b/src/include/device/pci_ehci.h
@@ -17,8 +17,8 @@
#ifndef _PCI_EHCI_H_
#define _PCI_EHCI_H_
-#include <arch/io.h>
#include <device/device.h>
+#include <device/pci_type.h>
#define EHCI_BAR_INDEX 0x10
#define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index 6971ce4de7..f1d50d7060 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -3,6 +3,7 @@
#include <stdint.h>
#include <device/device.h>
+#include <device/pci_type.h>
#include <arch/pci_ops.h>
#ifdef __SIMPLE_DEVICE__
diff --git a/src/include/device/pci_type.h b/src/include/device/pci_type.h
index 0b08e8d0aa..3f72c5f167 100644
--- a/src/include/device/pci_type.h
+++ b/src/include/device/pci_type.h
@@ -17,7 +17,6 @@
#include <stdint.h>
typedef u32 pci_devfn_t;
-typedef u32 pnp_devfn_t;
#define PCI_DEV(SEGBUS, DEV, FN) ( \
(((SEGBUS) & 0xFFF) << 20) | \
diff --git a/src/include/reg_script.h b/src/include/reg_script.h
index 28fc82db0f..7ca457a827 100644
--- a/src/include/reg_script.h
+++ b/src/include/reg_script.h
@@ -17,8 +17,8 @@
#define REG_SCRIPT_H
#include <stdint.h>
-#include <arch/io.h>
#include <device/device.h>
+#include <device/pci_type.h>
#include <device/resource.h>
/*
diff --git a/src/northbridge/amd/amdfam10/pci.h b/src/northbridge/amd/amdfam10/pci.h
index 8fcdbd8cca..8302582d02 100644
--- a/src/northbridge/amd/amdfam10/pci.h
+++ b/src/northbridge/amd/amdfam10/pci.h
@@ -18,6 +18,7 @@
#include <inttypes.h>
#include <arch/io.h>
+#include <device/pci_type.h>
#include <device/pci_def.h>
u32 pci_read_config32_index(pci_devfn_t dev, u32 index_reg, u32 index);