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authorArthur Heymans <arthur@aheymans.xyz>2021-11-30 21:03:14 +0100
committerArthur Heymans <arthur@aheymans.xyz>2022-06-02 05:48:08 +0000
commite771b9a65fe668bd04dd8dbdab8af4819a987d95 (patch)
tree76c053a12724b1d431ac274aabb91caa2c898e4d /src
parent7235cc19d6baef83c6bced1698db17aa7aaeec11 (diff)
cpu/x86/mp.h: Implement a pre-SSE2 mfence
Taken from the Linux Kernel. Tested: Qemu using '-cpu pentium3' now boots. Change-Id: I376f86f4d7992344dd68374ba67ad3580070f4d8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59766 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/cpu/x86/mp.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index 8105477c49..aea3ca1e3d 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -13,7 +13,11 @@ struct bus;
static inline void mfence(void)
{
- __asm__ __volatile__("mfence\t\n": : :"memory");
+ /* mfence came with the introduction of SSE2. */
+ if (CONFIG(SSE2))
+ __asm__ __volatile__("mfence\t\n": : :"memory");
+ else
+ __asm__ __volatile__("lock; addl $0,0(%%esp)": : : "memory");
}
/* The sequence of the callbacks are in calling order. */