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authorNico Huber <nico.h@gmx.de>2018-10-04 23:42:42 +0200
committerNico Huber <nico.h@gmx.de>2018-10-08 16:57:27 +0000
commitd44221f9c8f3686e040ff9481829315068b321a3 (patch)
tree76337bf1cae88feda44e3c63dd7e32e964e8767d /src
parent834543c0c71544b547194b093b8e1da990722762 (diff)
Move compiler.h to commonlib
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/include/arch/hlt.h2
-rw-r--r--src/arch/arm/stages.c1
-rw-r--r--src/arch/arm64/arm_tf.c1
-rw-r--r--src/arch/arm64/boot.c1
-rw-r--r--src/arch/arm64/include/arch/hlt.h2
-rw-r--r--src/arch/arm64/transition.c1
-rw-r--r--src/arch/mips/include/arch/hlt.h2
-rw-r--r--src/arch/power8/include/arch/hlt.h2
-rw-r--r--src/arch/riscv/include/arch/hlt.h2
-rw-r--r--src/arch/riscv/include/arch/io.h1
-rw-r--r--src/arch/x86/acpi.c1
-rw-r--r--src/arch/x86/acpi_s3.c1
-rw-r--r--src/arch/x86/acpigen.c1
-rw-r--r--src/arch/x86/cbmem.c1
-rw-r--r--src/arch/x86/exception.c1
-rw-r--r--src/arch/x86/gdt.c1
-rw-r--r--src/arch/x86/include/arch/acpi.h1
-rw-r--r--src/arch/x86/include/arch/hlt.h2
-rw-r--r--src/arch/x86/include/arch/io.h1
-rw-r--r--src/arch/x86/include/arch/pci_io_cfg.h1
-rw-r--r--src/arch/x86/include/arch/pci_mmio_cfg.h1
-rw-r--r--src/arch/x86/include/arch/pirq_routing.h1
-rw-r--r--src/arch/x86/include/arch/registers.h2
-rw-r--r--src/arch/x86/include/arch/smp/atomic.h2
-rw-r--r--src/arch/x86/include/arch/smp/mpspec.h1
-rw-r--r--src/arch/x86/include/arch/smp/spinlock.h2
-rw-r--r--src/arch/x86/mpspec.c1
-rw-r--r--src/arch/x86/pirq_routing.c1
-rw-r--r--src/arch/x86/postcar.c1
-rw-r--r--src/arch/x86/smbios.c1
-rw-r--r--src/arch/x86/timestamp.c1
-rw-r--r--src/commonlib/fsp_relocate.c1
-rw-r--r--src/commonlib/include/commonlib/cbfs_serialized.h1
-rw-r--r--src/commonlib/include/commonlib/compiler.h (renamed from src/include/compiler.h)23
-rw-r--r--src/commonlib/include/commonlib/fmap_serialized.h1
-rw-r--r--src/commonlib/include/commonlib/rmodule-defs.h1
-rw-r--r--src/commonlib/include/commonlib/tcpa_log_serialized.h1
-rw-r--r--src/commonlib/include/commonlib/timestamp_serialized.h1
-rw-r--r--src/commonlib/lz4_wrapper.c1
-rw-r--r--src/commonlib/storage/sdhci.c1
-rw-r--r--src/console/die.c1
-rw-r--r--src/console/post.c1
-rw-r--r--src/cpu/allwinner/a10/clock.h1
-rw-r--r--src/cpu/allwinner/a10/gpio.h1
-rw-r--r--src/cpu/allwinner/a10/timer.h1
-rw-r--r--src/cpu/allwinner/a10/uart.h1
-rw-r--r--src/cpu/amd/car/disable_cache_as_ram.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/init_cpus.c1
-rw-r--r--src/cpu/intel/microcode/microcode.c1
-rw-r--r--src/cpu/intel/smm/gen1/smmrelocate.c1
-rw-r--r--src/cpu/ti/am335x/clock.h1
-rw-r--r--src/cpu/ti/am335x/gpio.h1
-rw-r--r--src/cpu/ti/am335x/header.c1
-rw-r--r--src/cpu/ti/am335x/header.h1
-rw-r--r--src/cpu/ti/am335x/uart.h2
-rw-r--r--src/cpu/x86/mp_init.c1
-rw-r--r--src/cpu/x86/pae/pgtbl.c1
-rw-r--r--src/cpu/x86/smm/smihandler.c1
-rw-r--r--src/cpu/x86/smm/smm_module_handler.c1
-rw-r--r--src/cpu/x86/smm/smm_module_loader.c1
-rw-r--r--src/device/oprom/yabel/device.c1
-rw-r--r--src/device/oprom/yabel/device.h1
-rw-r--r--src/device/oprom/yabel/pmm.h1
-rw-r--r--src/device/pci_rom.c1
-rw-r--r--src/drivers/amd/agesa/romstage.c1
-rw-r--r--src/drivers/amd/agesa/state_machine.c1
-rw-r--r--src/drivers/elog/boot_count.c1
-rw-r--r--src/drivers/elog/elog_internal.h1
-rw-r--r--src/drivers/elog/gsmi.c2
-rw-r--r--src/drivers/i2c/designware/dw_i2c.h1
-rw-r--r--src/drivers/i2c/tpm/cr50.c1
-rw-r--r--src/drivers/i2c/tpm/tis_atmel.c1
-rw-r--r--src/drivers/intel/fsp1_0/fsp_util.c1
-rw-r--r--src/drivers/intel/fsp1_0/fsp_util.h1
-rw-r--r--src/drivers/intel/fsp1_1/car.c1
-rw-r--r--src/drivers/intel/fsp1_1/fsp_util.c1
-rw-r--r--src/drivers/intel/fsp1_1/raminit.c1
-rw-r--r--src/drivers/intel/fsp1_1/ramstage.c1
-rw-r--r--src/drivers/intel/fsp1_1/romstage.c1
-rw-r--r--src/drivers/intel/fsp2_0/graphics.c1
-rw-r--r--src/drivers/intel/fsp2_0/hob_display.c1
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/upd.h2
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/util.h1
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c1
-rw-r--r--src/drivers/intel/fsp2_0/notify.c1
-rw-r--r--src/drivers/intel/fsp2_0/upd_display.c1
-rw-r--r--src/drivers/intel/gma/intel_bios.h2
-rw-r--r--src/drivers/intel/gma/opregion.h1
-rw-r--r--src/drivers/intel/mipi_camera/chip.h1
-rw-r--r--src/drivers/intel/wifi/wifi.c1
-rw-r--r--src/drivers/mrc_cache/mrc_cache.c1
-rw-r--r--src/drivers/siemens/nc_fpga/nc_fpga.h2
-rw-r--r--src/drivers/spi/spi-generic.c1
-rw-r--r--src/drivers/spi/tpm/tpm.c1
-rw-r--r--src/drivers/usb/ehci.h2
-rw-r--r--src/drivers/usb/usb_ch9.h2
-rw-r--r--src/drivers/vpd/vpd_tables.h1
-rw-r--r--src/ec/google/chromeec/crosec_proto.c1
-rw-r--r--src/include/console/console.h1
-rw-r--r--src/include/console/spi.h1
-rw-r--r--src/include/cpu/amd/mtrr.h1
-rw-r--r--src/include/cpu/x86/cache.h1
-rw-r--r--src/include/cpu/x86/cr.h1
-rw-r--r--src/include/cpu/x86/lapic.h1
-rw-r--r--src/include/cpu/x86/msr.h2
-rw-r--r--src/include/cpu/x86/smm.h1
-rw-r--r--src/include/device/pci_ops.h1
-rw-r--r--src/include/elog.h2
-rw-r--r--src/include/halt.h1
-rw-r--r--src/include/memory_info.h1
-rw-r--r--src/include/reset.h2
-rw-r--r--src/include/sar.h1
-rw-r--r--src/include/smbios.h1
-rw-r--r--src/include/vbe.h1
-rw-r--r--src/lib/boot_device.c1
-rw-r--r--src/lib/bootblock.c1
-rw-r--r--src/lib/cbfs.c1
-rw-r--r--src/lib/cbmem_common.c1
-rw-r--r--src/lib/cbmem_console.c1
-rw-r--r--src/lib/coreboot_table.c1
-rw-r--r--src/lib/fallback_boot.c1
-rw-r--r--src/lib/gpio.c1
-rw-r--r--src/lib/hardwaremain.c1
-rw-r--r--src/lib/imd.c1
-rw-r--r--src/lib/imd_cbmem.c1
-rw-r--r--src/lib/prog_loaders.c1
-rw-r--r--src/lib/prog_ops.c1
-rw-r--r--src/lib/reset.c1
-rw-r--r--src/lib/timer.c1
-rw-r--r--src/lib/timestamp.c1
-rw-r--r--src/lib/wrdd.c1
-rw-r--r--src/mainboard/emulation/qemu-i440fx/fw_cfg.c1
-rw-r--r--src/mainboard/google/cyan/romstage.c1
-rw-r--r--src/mainboard/google/cyan/spd/spd.c1
-rw-r--r--src/mainboard/google/kahlee/mainboard.c1
-rw-r--r--src/mainboard/google/kahlee/romstage.c1
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c1
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/memory.c1
-rw-r--r--src/mainboard/google/octopus/mainboard.c1
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/memory.c1
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/google/poppy/ramstage.c1
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/memory.c1
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/google/poppy/variants/nami/mainboard.c1
-rw-r--r--src/mainboard/google/reef/mainboard.c1
-rw-r--r--src/mainboard/google/reef/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/google/reef/variants/baseboard/memory.c1
-rw-r--r--src/mainboard/google/reef/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/google/zoombini/memory.c1
-rw-r--r--src/mainboard/google/zoombini/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/google/zoombini/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/intel/coffeelake_rvp/memory.c1
-rw-r--r--src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/intel/galileo/vboot.c1
-rw-r--r--src/mainboard/intel/glkrvp/chromeos.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/boardid.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/memory.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/mainboard.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h1
-rw-r--r--src/mainboard/siemens/mc_tcu3/ptn3460.h1
-rw-r--r--src/northbridge/amd/amdfam10/amdfam10.h1
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.h1
-rw-r--r--src/northbridge/amd/lx/raminit.c1
-rw-r--r--src/northbridge/amd/pi/agesawrapper.c1
-rw-r--r--src/northbridge/intel/e7505/raminit.c1
-rw-r--r--src/northbridge/intel/haswell/haswell.h1
-rw-r--r--src/northbridge/intel/haswell/pei_data.h2
-rw-r--r--src/northbridge/intel/i945/raminit.h2
-rw-r--r--src/northbridge/intel/nehalem/raminit.c1
-rw-r--r--src/northbridge/intel/sandybridge/pei_data.h2
-rw-r--r--src/northbridge/intel/sandybridge/raminit.h1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c1
-rw-r--r--src/security/tpm/tss/tcg-2.0/tss_structures.h1
-rw-r--r--src/security/vboot/Makefile.inc6
-rw-r--r--src/security/vboot/bootmode.c1
-rw-r--r--src/security/vboot/vboot_common.c1
-rw-r--r--src/security/vboot/vboot_common.h1
-rw-r--r--src/security/vboot/vboot_logic.c1
-rw-r--r--src/security/vboot/verstage.c1
-rw-r--r--src/soc/amd/common/block/include/amdblocks/psp.h1
-rw-r--r--src/soc/amd/common/block/pi/agesawrapper.c1
-rw-r--r--src/soc/amd/common/block/pi/def_callouts.c1
-rw-r--r--src/soc/amd/stoneyridge/BiosCallOuts.c1
-rw-r--r--src/soc/amd/stoneyridge/gpio.c1
-rw-r--r--src/soc/amd/stoneyridge/include/soc/nvs.h1
-rw-r--r--src/soc/amd/stoneyridge/romstage.c1
-rw-r--r--src/soc/amd/stoneyridge/usb.c1
-rw-r--r--src/soc/intel/apollolake/chip.c1
-rw-r--r--src/soc/intel/apollolake/cse.c1
-rw-r--r--src/soc/intel/apollolake/include/soc/nvs.h1
-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h1
-rw-r--r--src/soc/intel/apollolake/romstage.c2
-rw-r--r--src/soc/intel/baytrail/gpio.c1
-rw-r--r--src/soc/intel/baytrail/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/baytrail/include/soc/efi_wrapper.h2
-rw-r--r--src/soc/intel/baytrail/include/soc/gpio.h1
-rw-r--r--src/soc/intel/baytrail/include/soc/mrc_wrapper.h2
-rw-r--r--src/soc/intel/baytrail/include/soc/nvs.h1
-rw-r--r--src/soc/intel/baytrail/include/soc/pmc.h1
-rw-r--r--src/soc/intel/baytrail/southcluster.c1
-rw-r--r--src/soc/intel/baytrail/spi.c1
-rw-r--r--src/soc/intel/braswell/acpi.c1
-rw-r--r--src/soc/intel/braswell/chip.c1
-rw-r--r--src/soc/intel/braswell/gpio.c1
-rw-r--r--src/soc/intel/braswell/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/braswell/include/soc/gpio.h1
-rw-r--r--src/soc/intel/braswell/include/soc/nvs.h1
-rw-r--r--src/soc/intel/braswell/include/soc/pm.h1
-rw-r--r--src/soc/intel/braswell/southcluster.c1
-rw-r--r--src/soc/intel/braswell/spi.c1
-rw-r--r--src/soc/intel/broadwell/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/gpio.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/me.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/nvs.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/pei_data.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/smm.h1
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c1
-rw-r--r--src/soc/intel/broadwell/spi.c1
-rw-r--r--src/soc/intel/cannonlake/chip.c1
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c1
-rw-r--r--src/soc/intel/cannonlake/include/soc/nvs.h1
-rw-r--r--src/soc/intel/cannonlake/include/soc/pm.h1
-rw-r--r--src/soc/intel/cannonlake/reset.c1
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c1
-rw-r--r--src/soc/intel/common/acpi_wake_source.c1
-rw-r--r--src/soc/intel/common/block/acpi/acpi.c1
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c1
-rw-r--r--src/soc/intel/common/block/ebda/ebda.c1
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c1
-rw-r--r--src/soc/intel/common/block/gspi/gspi.c1
-rw-r--r--src/soc/intel/common/block/lpc/lpc.c1
-rw-r--r--src/soc/intel/common/block/pmc/pmc.c1
-rw-r--r--src/soc/intel/common/block/pmc/pmclib.c1
-rw-r--r--src/soc/intel/common/block/rtc/rtc.c1
-rw-r--r--src/soc/intel/common/block/smm/smihandler.c1
-rw-r--r--src/soc/intel/common/block/sram/sram.c1
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent.c1
-rw-r--r--src/soc/intel/common/block/uart/uart.c1
-rw-r--r--src/soc/intel/common/block/xdci/xdci.c1
-rw-r--r--src/soc/intel/common/block/xhci/xhci.c1
-rw-r--r--src/soc/intel/common/mma.c1
-rw-r--r--src/soc/intel/common/vbt.c1
-rw-r--r--src/soc/intel/denverton_ns/acpi.c1
-rw-r--r--src/soc/intel/denverton_ns/fiamux.c1
-rw-r--r--src/soc/intel/denverton_ns/romstage.c1
-rw-r--r--src/soc/intel/fsp_baytrail/gpio.c1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/gpio.h1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/nvs.h1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/pmc.h1
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/gpio.h1
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/smm.h1
-rw-r--r--src/soc/intel/fsp_broadwell_de/spi.c1
-rw-r--r--src/soc/intel/quark/gpio_i2c.c1
-rw-r--r--src/soc/intel/quark/include/soc/pei_wrapper.h1
-rw-r--r--src/soc/intel/quark/include/soc/pm.h1
-rw-r--r--src/soc/intel/skylake/acpi.c1
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c1
-rw-r--r--src/soc/intel/skylake/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/skylake/include/soc/me.h2
-rw-r--r--src/soc/intel/skylake/include/soc/nvs.h1
-rw-r--r--src/soc/intel/skylake/include/soc/pei_data.h1
-rw-r--r--src/soc/intel/skylake/include/soc/pm.h1
-rw-r--r--src/soc/intel/skylake/include/soc/smm.h1
-rw-r--r--src/soc/intel/skylake/me.c1
-rw-r--r--src/soc/intel/skylake/romstage/romstage_fsp20.c1
-rw-r--r--src/soc/mediatek/common/mmu_operations.c1
-rw-r--r--src/soc/mediatek/common/timer.c1
-rw-r--r--src/soc/mediatek/common/uart.c1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/clk_rst.h2
-rw-r--r--src/soc/nvidia/tegra124/include/soc/dma.h1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/emc.h1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/spi.h1
-rw-r--r--src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c1
-rw-r--r--src/soc/nvidia/tegra124/uart.c1
-rw-r--r--src/soc/nvidia/tegra210/bootblock.c1
-rw-r--r--src/soc/nvidia/tegra210/funitcfg.c1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/clk_rst.h1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/clst_clk.h2
-rw-r--r--src/soc/nvidia/tegra210/include/soc/dma.h1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/emc.h1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/spi.h1
-rw-r--r--src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c1
-rw-r--r--src/soc/nvidia/tegra210/romstage.c1
-rw-r--r--src/soc/nvidia/tegra210/uart.c1
-rw-r--r--src/soc/qualcomm/ipq40xx/include/soc/cdp.h1
-rw-r--r--src/soc/qualcomm/ipq40xx/lcc.c1
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/cdp.h1
-rw-r--r--src/soc/qualcomm/ipq806x/lcc.c1
-rw-r--r--src/soc/samsung/exynos5250/i2c.c1
-rw-r--r--src/soc/samsung/exynos5250/include/soc/power.h1
-rw-r--r--src/soc/samsung/exynos5420/i2c.c1
-rw-r--r--src/soc/samsung/exynos5420/include/soc/dmc.h2
-rw-r--r--src/soc/samsung/exynos5420/include/soc/power.h1
-rw-r--r--src/southbridge/amd/sb700/sata.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me.h2
-rw-r--r--src/southbridge/intel/bd82x6x/nvs.h1
-rw-r--r--src/southbridge/intel/common/gpio.h1
-rw-r--r--src/southbridge/intel/common/smihandler.c1
-rw-r--r--src/southbridge/intel/common/spi.c1
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/gpio.h2
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/me.h2
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/nvs.h1
-rw-r--r--src/southbridge/intel/fsp_i89xx/gpio.h2
-rw-r--r--src/southbridge/intel/fsp_i89xx/me.h2
-rw-r--r--src/southbridge/intel/fsp_i89xx/nvs.h1
-rw-r--r--src/southbridge/intel/fsp_rangeley/gpio.h2
-rw-r--r--src/southbridge/intel/fsp_rangeley/nvs.h2
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c1
-rw-r--r--src/southbridge/intel/i82801dx/nvs.h2
-rw-r--r--src/southbridge/intel/i82801gx/nvs.h2
-rw-r--r--src/southbridge/intel/i82801ix/nvs.h2
-rw-r--r--src/southbridge/intel/i82801jx/nvs.h2
-rw-r--r--src/southbridge/intel/ibexpeak/me.h2
-rw-r--r--src/southbridge/intel/ibexpeak/nvs.h1
-rw-r--r--src/southbridge/intel/lynxpoint/lp_gpio.h2
-rw-r--r--src/southbridge/intel/lynxpoint/me.h2
-rw-r--r--src/southbridge/intel/lynxpoint/nvs.h1
-rw-r--r--src/southbridge/ricoh/rl5c476/rl5c476.h1
-rw-r--r--src/vendorcode/amd/pi/00670F00/Makefile.inc1
-rw-r--r--src/vendorcode/amd/pi/Makefile.inc4
-rw-r--r--src/vendorcode/google/chromeos/gnvs.h2
333 files changed, 29 insertions, 378 deletions
diff --git a/src/arch/arm/include/arch/hlt.h b/src/arch/arm/include/arch/hlt.h
index fd2aac9c9f..915f4c003a 100644
--- a/src/arch/arm/include/arch/hlt.h
+++ b/src/arch/arm/include/arch/hlt.h
@@ -14,8 +14,6 @@
#ifndef ARCH_HLT_H
#define ARCH_HLT_H
-#include <compiler.h>
-
static __always_inline void hlt(void)
{
for (;;) ;
diff --git a/src/arch/arm/stages.c b/src/arch/arm/stages.c
index 1fae88637a..22ade638ae 100644
--- a/src/arch/arm/stages.c
+++ b/src/arch/arm/stages.c
@@ -26,7 +26,6 @@
#include <arch/stages.h>
#include <arch/cache.h>
-#include <compiler.h>
/**
* generic stage entry point. override this if board specific code is needed.
diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c
index 88416ea27d..fcf66cac61 100644
--- a/src/arch/arm64/arm_tf.c
+++ b/src/arch/arm64/arm_tf.c
@@ -21,7 +21,6 @@
#include <assert.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <program_loading.h>
/*
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index 95c51d3842..2357912eae 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -19,7 +19,6 @@
#include <arch/transition.h>
#include <arm_tf.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <program_loading.h>
#include <rules.h>
diff --git a/src/arch/arm64/include/arch/hlt.h b/src/arch/arm64/include/arch/hlt.h
index fd2aac9c9f..915f4c003a 100644
--- a/src/arch/arm64/include/arch/hlt.h
+++ b/src/arch/arm64/include/arch/hlt.h
@@ -14,8 +14,6 @@
#ifndef ARCH_HLT_H
#define ARCH_HLT_H
-#include <compiler.h>
-
static __always_inline void hlt(void)
{
for (;;) ;
diff --git a/src/arch/arm64/transition.c b/src/arch/arm64/transition.c
index ee5e57036a..fb4f4be162 100644
--- a/src/arch/arm64/transition.c
+++ b/src/arch/arm64/transition.c
@@ -18,7 +18,6 @@
#include <arch/mmu.h>
#include <arch/transition.h>
#include <assert.h>
-#include <compiler.h>
#include <console/console.h>
/* Litte-endian, No XN-forced, Instr cache disabled,
diff --git a/src/arch/mips/include/arch/hlt.h b/src/arch/mips/include/arch/hlt.h
index dd66c440ab..703773ba20 100644
--- a/src/arch/mips/include/arch/hlt.h
+++ b/src/arch/mips/include/arch/hlt.h
@@ -16,8 +16,6 @@
#ifndef __MIPS_ARCH_HLT_H
#define __MIPS_ARCH_HLT_H
-#include <compiler.h>
-
static inline __always_inline void hlt(void)
{
for (;;)
diff --git a/src/arch/power8/include/arch/hlt.h b/src/arch/power8/include/arch/hlt.h
index 19c7ecceb8..1ba1e35b67 100644
--- a/src/arch/power8/include/arch/hlt.h
+++ b/src/arch/power8/include/arch/hlt.h
@@ -11,8 +11,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
-
static __always_inline void hlt(void)
{
while (1)
diff --git a/src/arch/riscv/include/arch/hlt.h b/src/arch/riscv/include/arch/hlt.h
index 2ea2e01f50..a955ebbb0c 100644
--- a/src/arch/riscv/include/arch/hlt.h
+++ b/src/arch/riscv/include/arch/hlt.h
@@ -11,8 +11,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
-
static __always_inline void hlt(void)
{
while (1);
diff --git a/src/arch/riscv/include/arch/io.h b/src/arch/riscv/include/arch/io.h
index 6fd0cac88e..d086d0cdb2 100644
--- a/src/arch/riscv/include/arch/io.h
+++ b/src/arch/riscv/include/arch/io.h
@@ -16,7 +16,6 @@
#include <endian.h>
#include <stdint.h>
-#include <compiler.h>
static __always_inline uint8_t read8(const volatile void *addr)
{
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
index d75d889513..1b430041f7 100644
--- a/src/arch/x86/acpi.c
+++ b/src/arch/x86/acpi.c
@@ -44,7 +44,6 @@
#include <arch/acpigen.h>
#include <device/pci.h>
#include <cbmem.h>
-#include <compiler.h>
#include <cpu/x86/lapic_def.h>
#include <cpu/cpu.h>
#include <cbfs.h>
diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c
index ebf291cdce..71267f033b 100644
--- a/src/arch/x86/acpi_s3.c
+++ b/src/arch/x86/acpi_s3.c
@@ -17,7 +17,6 @@
#include <string.h>
#include <arch/acpi.h>
#include <cbmem.h>
-#include <compiler.h>
#include <cpu/cpu.h>
#include <fallback.h>
#include <timestamp.h>
diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c
index a630ef2118..de3d39e3b4 100644
--- a/src/arch/x86/acpigen.c
+++ b/src/arch/x86/acpigen.c
@@ -28,7 +28,6 @@
#include <lib.h>
#include <string.h>
#include <arch/acpigen.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c
index 52f8f8a5de..b3d89f4953 100644
--- a/src/arch/x86/cbmem.c
+++ b/src/arch/x86/cbmem.c
@@ -13,7 +13,6 @@
#include <stdlib.h>
#include <cbmem.h>
-#include <compiler.h>
#include <arch/acpi.h>
#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c
index 201e835e16..a281c54c1d 100644
--- a/src/arch/x86/exception.c
+++ b/src/arch/x86/exception.c
@@ -15,7 +15,6 @@
#include <arch/early_variables.h>
#include <arch/exception.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <console/console.h>
#include <console/streams.h>
#include <cpu/x86/cr.h>
diff --git a/src/arch/x86/gdt.c b/src/arch/x86/gdt.c
index 24a1c81072..83ab858e22 100644
--- a/src/arch/x86/gdt.c
+++ b/src/arch/x86/gdt.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <string.h>
-#include <compiler.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/gdt.h>
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index c84adda0d0..54be1f40b7 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -54,7 +54,6 @@
#if !defined(__ASSEMBLER__) && !defined(__ACPI__) && !defined(__ROMCC__)
#include <stdint.h>
-#include <compiler.h>
#include <rules.h>
#include <commonlib/helpers.h>
#include <device/device.h>
diff --git a/src/arch/x86/include/arch/hlt.h b/src/arch/x86/include/arch/hlt.h
index cf7176ae90..7b18f55657 100644
--- a/src/arch/x86/include/arch/hlt.h
+++ b/src/arch/x86/include/arch/hlt.h
@@ -20,8 +20,6 @@ static void hlt(void)
__builtin_hlt();
}
#else
-#include <compiler.h>
-
static __always_inline void hlt(void)
{
asm("hlt");
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 64b5f120e0..1b0fdb0515 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -14,7 +14,6 @@
#ifndef _ASM_IO_H
#define _ASM_IO_H
-#include <compiler.h>
#include <endian.h>
#include <stdint.h>
#include <rules.h>
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index 15d1a132cf..ddc62ed393 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -14,7 +14,6 @@
#ifndef _PCI_IO_CFG_H
#define _PCI_IO_CFG_H
-#include <compiler.h>
#include <arch/io.h>
static __always_inline
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
index a5ca574466..c660ed5332 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/arch/x86/include/arch/pci_mmio_cfg.h
@@ -17,7 +17,6 @@
#define _PCI_MMIO_CFG_H
#include <arch/io.h>
-#include <compiler.h>
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
diff --git a/src/arch/x86/include/arch/pirq_routing.h b/src/arch/x86/include/arch/pirq_routing.h
index 01179121ec..b416ec1422 100644
--- a/src/arch/x86/include/arch/pirq_routing.h
+++ b/src/arch/x86/include/arch/pirq_routing.h
@@ -28,7 +28,6 @@
#define MAX_INTX_ENTRIES 4
#include <stdint.h>
-#include <compiler.h>
#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
#define PIRQ_VERSION 0x0100
diff --git a/src/arch/x86/include/arch/registers.h b/src/arch/x86/include/arch/registers.h
index 9a618f4870..08f83ac091 100644
--- a/src/arch/x86/include/arch/registers.h
+++ b/src/arch/x86/include/arch/registers.h
@@ -16,8 +16,6 @@
#ifndef __ARCH_REGISTERS_H
#define __ARCH_REGISTERS_H
-#include <compiler.h>
-
#if !defined(__ASSEMBLER__)
#define DOWNTO8(A) \
union { \
diff --git a/src/arch/x86/include/arch/smp/atomic.h b/src/arch/x86/include/arch/smp/atomic.h
index b12da12e54..75650c7f98 100644
--- a/src/arch/x86/include/arch/smp/atomic.h
+++ b/src/arch/x86/include/arch/smp/atomic.h
@@ -14,8 +14,6 @@
#ifndef ARCH_SMP_ATOMIC_H
#define ARCH_SMP_ATOMIC_H
-#include <compiler.h>
-
/*
* Make sure gcc doesn't try to be clever and move things around
* on us. We need to use _exactly_ the address the user gave us,
diff --git a/src/arch/x86/include/arch/smp/mpspec.h b/src/arch/x86/include/arch/smp/mpspec.h
index 8b3e8bb8f9..1e7300fea6 100644
--- a/src/arch/x86/include/arch/smp/mpspec.h
+++ b/src/arch/x86/include/arch/smp/mpspec.h
@@ -16,7 +16,6 @@
#ifndef __ASM_MPSPEC_H
#define __ASM_MPSPEC_H
-#include <compiler.h>
#include <device/device.h>
#include <cpu/x86/lapic_def.h>
diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index 212cd8cd64..183d726d19 100644
--- a/src/arch/x86/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
@@ -14,8 +14,6 @@
#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
-#include <compiler.h>
-
#if !defined(__PRE_RAM__) \
|| IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \
|| IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) \
diff --git a/src/arch/x86/mpspec.c b/src/arch/x86/mpspec.c
index 8280171ac6..8dd902e1d7 100644
--- a/src/arch/x86/mpspec.c
+++ b/src/arch/x86/mpspec.c
@@ -17,7 +17,6 @@
#include <device/path.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
-#include <compiler.h>
#include <arch/smp/mpspec.h>
#include <string.h>
#include <arch/cpu.h>
diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c
index 96117fc43f..7aa50d7542 100644
--- a/src/arch/x86/pirq_routing.c
+++ b/src/arch/x86/pirq_routing.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
-#include <compiler.h>
#include <arch/pirq_routing.h>
#include <string.h>
#include <device/pci.h>
diff --git a/src/arch/x86/postcar.c b/src/arch/x86/postcar.c
index 6497b73e10..295276bf8d 100644
--- a/src/arch/x86/postcar.c
+++ b/src/arch/x86/postcar.c
@@ -15,7 +15,6 @@
#include <arch/cpu.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <main_decl.h>
#include <program_loading.h>
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index fc3a0a7f6b..c0545ce779 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -20,7 +20,6 @@
#include <stdlib.h>
#include <string.h>
#include <smbios.h>
-#include <compiler.h>
#include <console/console.h>
#include <version.h>
#include <device/device.h>
diff --git a/src/arch/x86/timestamp.c b/src/arch/x86/timestamp.c
index b0aac9c1ab..928d7d7402 100644
--- a/src/arch/x86/timestamp.c
+++ b/src/arch/x86/timestamp.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <cpu/x86/tsc.h>
#include <timestamp.h>
diff --git a/src/commonlib/fsp_relocate.c b/src/commonlib/fsp_relocate.c
index d96edd2178..fe58a29d27 100644
--- a/src/commonlib/fsp_relocate.c
+++ b/src/commonlib/fsp_relocate.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <commonlib/endian.h>
#include <commonlib/fsp.h>
diff --git a/src/commonlib/include/commonlib/cbfs_serialized.h b/src/commonlib/include/commonlib/cbfs_serialized.h
index e8f027fad3..6e254f6bbe 100644
--- a/src/commonlib/include/commonlib/cbfs_serialized.h
+++ b/src/commonlib/include/commonlib/cbfs_serialized.h
@@ -48,7 +48,6 @@
#define _CBFS_SERIALIZED_H_
#include <stdint.h>
-#include <compiler.h>
/** These are standard values for the known compression
algorithms that coreboot knows about for stages and
diff --git a/src/include/compiler.h b/src/commonlib/include/commonlib/compiler.h
index 96c2045e4d..2e0c454fc9 100644
--- a/src/include/compiler.h
+++ b/src/commonlib/include/commonlib/compiler.h
@@ -13,20 +13,39 @@
* GNU General Public License for more details.
*/
-#ifndef __COMPILER_H__
-#define __COMPILER_H__
+#ifndef _COMMONLIB_COMPILER_H_
+#define _COMMONLIB_COMPILER_H_
+#ifndef __packed
#if defined(__WIN32) || defined(__WIN64)
#define __packed __attribute__((gcc_struct, packed))
#else
#define __packed __attribute__((packed))
#endif
+#endif
+#ifndef __aligned
#define __aligned(x) __attribute__((aligned(x)))
+#endif
+
+#ifndef __always_unused
#define __always_unused __attribute__((unused))
+#endif
+
+#ifndef __must_check
#define __must_check __attribute__((warn_unused_result))
+#endif
+
+#ifndef __weak
#define __weak __attribute__((weak))
+#endif
+
+#ifndef __noreturn
#define __noreturn __attribute__((noreturn))
+#endif
+
+#ifndef __always_inline
#define __always_inline inline __attribute__((always_inline))
+#endif
#endif
diff --git a/src/commonlib/include/commonlib/fmap_serialized.h b/src/commonlib/include/commonlib/fmap_serialized.h
index cea231b2c2..1e83760442 100644
--- a/src/commonlib/include/commonlib/fmap_serialized.h
+++ b/src/commonlib/include/commonlib/fmap_serialized.h
@@ -37,7 +37,6 @@
#define FLASHMAP_SERIALIZED_H__
#include <stdint.h>
-#include <compiler.h>
#define FMAP_SIGNATURE "__FMAP__"
#define FMAP_VER_MAJOR 1 /* this header's FMAP minor version */
diff --git a/src/commonlib/include/commonlib/rmodule-defs.h b/src/commonlib/include/commonlib/rmodule-defs.h
index 485d6383bf..564fcd26af 100644
--- a/src/commonlib/include/commonlib/rmodule-defs.h
+++ b/src/commonlib/include/commonlib/rmodule-defs.h
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
-#include <compiler.h>
#define RMODULE_MAGIC 0xf8fe
#define RMODULE_VERSION_1 1
diff --git a/src/commonlib/include/commonlib/tcpa_log_serialized.h b/src/commonlib/include/commonlib/tcpa_log_serialized.h
index 6dfb566fdc..1e9ffaab87 100644
--- a/src/commonlib/include/commonlib/tcpa_log_serialized.h
+++ b/src/commonlib/include/commonlib/tcpa_log_serialized.h
@@ -16,7 +16,6 @@
#ifndef __TCPA_LOG_SERIALIZED_H__
#define __TCPA_LOG_SERIALIZED_H__
-#include <compiler.h>
#include <stdint.h>
#define MAX_TCPA_LOG_ENTRIES 50
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
index 304e43fab9..cbf07b5aac 100644
--- a/src/commonlib/include/commonlib/timestamp_serialized.h
+++ b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -17,7 +17,6 @@
#define __TIMESTAMP_SERIALIZED_H__
#include <stdint.h>
-#include <compiler.h>
struct timestamp_entry {
uint32_t entry_id;
diff --git a/src/commonlib/lz4_wrapper.c b/src/commonlib/lz4_wrapper.c
index 8f516089ca..474df642c2 100644
--- a/src/commonlib/lz4_wrapper.c
+++ b/src/commonlib/lz4_wrapper.c
@@ -34,7 +34,6 @@
#include <commonlib/helpers.h>
#include <stdint.h>
#include <string.h>
-#include <compiler.h>
/* LZ4 comes with its own supposedly portable memory access functions, but they
* seem to be very inefficient in practice (at least on ARM64). Since coreboot
diff --git a/src/commonlib/storage/sdhci.c b/src/commonlib/storage/sdhci.c
index 158e28b648..fd3915f92e 100644
--- a/src/commonlib/storage/sdhci.c
+++ b/src/commonlib/storage/sdhci.c
@@ -22,7 +22,6 @@
#include <commonlib/sd_mmc_ctrlr.h>
#include <commonlib/sdhci.h>
#include <commonlib/storage.h>
-#include <compiler.h>
#include <delay.h>
#include <endian.h>
#include <halt.h>
diff --git a/src/console/die.c b/src/console/die.c
index 59411256be..aedf66e3ec 100644
--- a/src/console/die.c
+++ b/src/console/die.c
@@ -15,7 +15,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <halt.h>
diff --git a/src/console/post.c b/src/console/post.c
index 969c7c703f..323a1910f9 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -16,7 +16,6 @@
#include <arch/io.h>
#include <elog.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/cpu/allwinner/a10/clock.h b/src/cpu/allwinner/a10/clock.h
index 815a94d139..110a6f8ec9 100644
--- a/src/cpu/allwinner/a10/clock.h
+++ b/src/cpu/allwinner/a10/clock.h
@@ -23,7 +23,6 @@
#include "memmap.h"
#include <types.h>
-#include <compiler.h>
/* CPU_AHB_APB0 config values */
#define CPU_CLK_SRC_MASK (3 << 16)
diff --git a/src/cpu/allwinner/a10/gpio.h b/src/cpu/allwinner/a10/gpio.h
index a126801000..c05122fea6 100644
--- a/src/cpu/allwinner/a10/gpio.h
+++ b/src/cpu/allwinner/a10/gpio.h
@@ -19,7 +19,6 @@
#define __CPU_ALLWINNER_A10_PINMUX_H
#include <types.h>
-#include <compiler.h>
#define GPIO_BASE 0x01C20800
diff --git a/src/cpu/allwinner/a10/timer.h b/src/cpu/allwinner/a10/timer.h
index e24bf6618b..b7658da35d 100644
--- a/src/cpu/allwinner/a10/timer.h
+++ b/src/cpu/allwinner/a10/timer.h
@@ -23,7 +23,6 @@
#include "memmap.h"
#include <types.h>
-#include <compiler.h>
/* TMRx_CTRL values */
#define TIMER_CTRL_MODE_SINGLE (1 << 7)
diff --git a/src/cpu/allwinner/a10/uart.h b/src/cpu/allwinner/a10/uart.h
index 92a87e5d11..a57fc9c361 100644
--- a/src/cpu/allwinner/a10/uart.h
+++ b/src/cpu/allwinner/a10/uart.h
@@ -26,7 +26,6 @@
#define CPU_ALLWINNER_A10_UART_H
#include <types.h>
-#include <compiler.h>
struct a10_uart {
union {
diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c
index 36d4120453..a079ce49b1 100644
--- a/src/cpu/amd/car/disable_cache_as_ram.c
+++ b/src/cpu/amd/car/disable_cache_as_ram.c
@@ -19,7 +19,6 @@
* WARNING: this file will be used by both any AP cores and core 0 / node 0
*/
-#include <compiler.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 4911eca38a..51cf5104b4 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include "init_cpus.h"
#if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 8cfcb95182..60342359c2 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -24,7 +24,6 @@
#else
#include <arch/cbfs.h>
#endif
-#include <compiler.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/microcode.h>
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index a5a9de3a1c..5d78efd3de 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -18,7 +18,6 @@
#include <types.h>
#include <string.h>
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <cpu/cpu.h>
diff --git a/src/cpu/ti/am335x/clock.h b/src/cpu/ti/am335x/clock.h
index 564838a0e4..c0b62fcb63 100644
--- a/src/cpu/ti/am335x/clock.h
+++ b/src/cpu/ti/am335x/clock.h
@@ -16,7 +16,6 @@
#define __CPU_TI_AM335X_CLOCK_H__
#include <stdint.h>
-#include <compiler.h>
enum {
CM_ST_NO_SLEEP = 0x0,
diff --git a/src/cpu/ti/am335x/gpio.h b/src/cpu/ti/am335x/gpio.h
index 41fc3d358e..c04a00ce0f 100644
--- a/src/cpu/ti/am335x/gpio.h
+++ b/src/cpu/ti/am335x/gpio.h
@@ -16,7 +16,6 @@
#define __CPU_TI_AM335X_GPIO_H__
#include <stdint.h>
-#include <compiler.h>
enum {
AM335X_GPIO_BITS_PER_BANK = 32
diff --git a/src/cpu/ti/am335x/header.c b/src/cpu/ti/am335x/header.c
index a260425f48..847c8b073c 100644
--- a/src/cpu/ti/am335x/header.c
+++ b/src/cpu/ti/am335x/header.c
@@ -15,7 +15,6 @@
#include <stddef.h>
#include <stdint.h>
#include <symbols.h>
-#include <compiler.h>
#include "header.h"
diff --git a/src/cpu/ti/am335x/header.h b/src/cpu/ti/am335x/header.h
index 64d75c7512..fa5bf74071 100644
--- a/src/cpu/ti/am335x/header.h
+++ b/src/cpu/ti/am335x/header.h
@@ -16,7 +16,6 @@
#define __CPU_TI_AM335X_HEADER_H
#include <stdint.h>
-#include <compiler.h>
struct configuration_header_toc_item {
// Offset from the start address of the TOC to the actual address of
diff --git a/src/cpu/ti/am335x/uart.h b/src/cpu/ti/am335x/uart.h
index 7a65076b10..000a45dbf7 100644
--- a/src/cpu/ti/am335x/uart.h
+++ b/src/cpu/ti/am335x/uart.h
@@ -15,8 +15,6 @@
#ifndef AM335X_UART_H
#define AM335X_UART_H
-#include <compiler.h>
-
#define AM335X_UART0_BASE 0x44e09000
#define AM335X_UART1_BASE 0x48020000
#define AM335X_UART2_BASE 0x48024000
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index 08cd1f50b3..aa2a4695a4 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <stdint.h>
-#include <compiler.h>
#include <rmodule.h>
#include <arch/cpu.h>
#include <cpu/cpu.h>
diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c
index cf6bf16413..795caac355 100644
--- a/src/cpu/x86/pae/pgtbl.c
+++ b/src/cpu/x86/pae/pgtbl.c
@@ -14,7 +14,6 @@
*/
#include <cbfs.h>
-#include <compiler.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <cpu/cpu.h>
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 99a62896de..b2fc8b600f 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -15,7 +15,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c
index 4fa8a34172..f9af965208 100644
--- a/src/cpu/x86/smm/smm_module_handler.c
+++ b/src/cpu/x86/smm/smm_module_handler.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <rmodule.h>
diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c
index 9fd8c498bb..6c166454dc 100644
--- a/src/cpu/x86/smm/smm_module_loader.c
+++ b/src/cpu/x86/smm/smm_module_loader.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <string.h>
#include <rmodule.h>
#include <cpu/x86/smm.h>
diff --git a/src/device/oprom/yabel/device.c b/src/device/oprom/yabel/device.c
index cd1abfb026..438485effb 100644
--- a/src/device/oprom/yabel/device.c
+++ b/src/device/oprom/yabel/device.c
@@ -33,7 +33,6 @@
*****************************************************************************/
-#include <compiler.h>
#include "device.h"
#include "compat/rtas.h"
#include <string.h>
diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h
index 1028ef1833..f67a388300 100644
--- a/src/device/oprom/yabel/device.h
+++ b/src/device/oprom/yabel/device.h
@@ -36,7 +36,6 @@
#define DEVICE_LIB_H
#include <types.h>
-#include <compiler.h>
#include <endian.h>
#include "compat/of.h"
#include "debug.h"
diff --git a/src/device/oprom/yabel/pmm.h b/src/device/oprom/yabel/pmm.h
index 3c96700e16..2ecc36e43f 100644
--- a/src/device/oprom/yabel/pmm.h
+++ b/src/device/oprom/yabel/pmm.h
@@ -35,7 +35,6 @@
#define _YABEL_PMM_H_
#include <types.h>
-#include <compiler.h>
/* PMM Structure see PMM Spec Version 1.01 Chapter 3.1.1
* (search web for specspmm101.pdf)
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index 517fb33baa..65989d4724 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -19,7 +19,6 @@
#include <console/console.h>
#include <commonlib/endian.h>
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c
index 90fa0598f9..9b4c50a15e 100644
--- a/src/drivers/amd/agesa/romstage.c
+++ b/src/drivers/amd/agesa/romstage.c
@@ -18,7 +18,6 @@
#include <cbmem.h>
#include <cpu/amd/car.h>
#include <cpu/x86/bist.h>
-#include <compiler.h>
#include <console/console.h>
#include <halt.h>
#include <program_loading.h>
diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c
index 673bf9b9a0..e1fdd42b38 100644
--- a/src/drivers/amd/agesa/state_machine.c
+++ b/src/drivers/amd/agesa/state_machine.c
@@ -21,7 +21,6 @@
#include <bootstate.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
diff --git a/src/drivers/elog/boot_count.c b/src/drivers/elog/boot_count.c
index f1ae9d8f66..c4373ee44a 100644
--- a/src/drivers/elog/boot_count.c
+++ b/src/drivers/elog/boot_count.c
@@ -18,7 +18,6 @@
#include <pc80/mc146818rtc.h>
#include <stddef.h>
#include <stdint.h>
-#include <compiler.h>
#include <elog.h>
/*
diff --git a/src/drivers/elog/elog_internal.h b/src/drivers/elog/elog_internal.h
index 3ccee90c46..afcee5736f 100644
--- a/src/drivers/elog/elog_internal.h
+++ b/src/drivers/elog/elog_internal.h
@@ -16,7 +16,6 @@
#ifndef ELOG_INTERNAL_H_
#define ELOG_INTERNAL_H_
-#include <compiler.h>
/* ELOG header */
struct elog_header {
u32 magic;
diff --git a/src/drivers/elog/gsmi.c b/src/drivers/elog/gsmi.c
index cced4a1293..5ecb2c5935 100644
--- a/src/drivers/elog/gsmi.c
+++ b/src/drivers/elog/gsmi.c
@@ -13,9 +13,7 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <elog.h>
diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h
index ccdb3d2351..17304a18dc 100644
--- a/src/drivers/i2c/designware/dw_i2c.h
+++ b/src/drivers/i2c/designware/dw_i2c.h
@@ -16,7 +16,6 @@
#ifndef __DRIVERS_I2C_DESIGNWARE_I2C_H__
#define __DRIVERS_I2C_DESIGNWARE_I2C_H__
-#include <compiler.h>
#include <device/device.h>
#include <device/i2c.h>
#include <stdint.h>
diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c
index 14a84de96f..b0d3b29044 100644
--- a/src/drivers/i2c/tpm/cr50.c
+++ b/src/drivers/i2c/tpm/cr50.c
@@ -31,7 +31,6 @@
#include <arch/early_variables.h>
#include <commonlib/endian.h>
-#include <compiler.h>
#include <stdint.h>
#include <string.h>
#include <types.h>
diff --git a/src/drivers/i2c/tpm/tis_atmel.c b/src/drivers/i2c/tpm/tis_atmel.c
index 2bea13565d..0c1d86d33d 100644
--- a/src/drivers/i2c/tpm/tis_atmel.c
+++ b/src/drivers/i2c/tpm/tis_atmel.c
@@ -14,7 +14,6 @@
#include <arch/early_variables.h>
#include <stdint.h>
-#include <compiler.h>
#include <string.h>
#include <assert.h>
#include <commonlib/endian.h>
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
index 5d866bfad8..a09b1b141c 100644
--- a/src/drivers/intel/fsp1_0/fsp_util.c
+++ b/src/drivers/intel/fsp1_0/fsp_util.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <string.h>
-#include <compiler.h>
#include <console/console.h>
#include <bootstate.h>
#include <cbmem.h>
diff --git a/src/drivers/intel/fsp1_0/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h
index 594a25939f..d5d0160e49 100644
--- a/src/drivers/intel/fsp1_0/fsp_util.h
+++ b/src/drivers/intel/fsp1_0/fsp_util.h
@@ -16,7 +16,6 @@
#ifndef FSP_UTIL_H
#define FSP_UTIL_H
-#include <compiler.h>
#include <chipset_fsp_util.h>
#include "fsp_values.h"
diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c
index 686a4c8c7e..4016ba1a8e 100644
--- a/src/drivers/intel/fsp1_1/car.c
+++ b/src/drivers/intel/fsp1_1/car.c
@@ -14,7 +14,6 @@
*/
#include <arch/early_variables.h>
-#include <compiler.h>
#include <console/console.h>
#include <fsp/car.h>
#include <fsp/util.h>
diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c
index 0116ac2746..2c5e9a769e 100644
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ b/src/drivers/intel/fsp1_1/fsp_util.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c
index e5714ae140..407a0b6093 100644
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ b/src/drivers/intel/fsp1_1/raminit.c
@@ -15,7 +15,6 @@
#include <arch/acpi.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <fsp/memmap.h>
#include <fsp/romstage.h>
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index a4609df573..2b857ab0f0 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -18,7 +18,6 @@
#include <arch/acpi.h>
#include <cbmem.h>
#include <cbfs.h>
-#include <compiler.h>
#include <console/console.h>
#include <fsp/memmap.h>
#include <fsp/ramstage.h>
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index 0f13efe424..b239d86480 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -20,7 +20,6 @@
#include <arch/cbfs.h>
#include <arch/early_variables.h>
#include <assert.h>
-#include <compiler.h>
#include <console/console.h>
#include <cbmem.h>
#include <cpu/intel/microcode.h>
diff --git a/src/drivers/intel/fsp2_0/graphics.c b/src/drivers/intel/fsp2_0/graphics.c
index ae1442ee9d..e8514974d7 100644
--- a/src/drivers/intel/fsp2_0/graphics.c
+++ b/src/drivers/intel/fsp2_0/graphics.c
@@ -10,7 +10,6 @@
* (at your option) any later version.
*/
-#include <compiler.h>
#include <cbfs.h>
#include <console/console.h>
#include <fsp/util.h>
diff --git a/src/drivers/intel/fsp2_0/hob_display.c b/src/drivers/intel/fsp2_0/hob_display.c
index 977facbfc6..24a340f344 100644
--- a/src/drivers/intel/fsp2_0/hob_display.c
+++ b/src/drivers/intel/fsp2_0/hob_display.c
@@ -9,7 +9,6 @@
* (at your option) any later version.
*/
-#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
diff --git a/src/drivers/intel/fsp2_0/include/fsp/upd.h b/src/drivers/intel/fsp2_0/include/fsp/upd.h
index 580257bd8e..15094dfb10 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/upd.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/upd.h
@@ -12,8 +12,6 @@
#ifndef _FSP2_0_UPD_H_
#define _FSP2_0_UPD_H_
-#include <compiler.h>
-
struct FSP_UPD_HEADER {
///
/// UPD Region Signature. This signature will be
diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h
index e7778ec182..231162ed17 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/util.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/util.h
@@ -13,7 +13,6 @@
#ifndef _FSP2_0_UTIL_H_
#define _FSP2_0_UTIL_H_
-#include <compiler.h>
#include <boot/coreboot_tables.h>
#include <commonlib/region.h>
#include <arch/cpu.h>
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index accb70ba91..dc37eaaf1b 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -11,7 +11,6 @@
* (at your option) any later version.
*/
-#include <compiler.h>
#include <security/vboot/antirollback.h>
#include <arch/io.h>
#include <arch/cpu.h>
diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c
index 6d6d623be4..2907ae25b1 100644
--- a/src/drivers/intel/fsp2_0/notify.c
+++ b/src/drivers/intel/fsp2_0/notify.c
@@ -12,7 +12,6 @@
#include <arch/cpu.h>
#include <bootstate.h>
-#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
#include <soc/intel/common/util.h>
diff --git a/src/drivers/intel/fsp2_0/upd_display.c b/src/drivers/intel/fsp2_0/upd_display.c
index 415505e1dd..19803c4f2f 100644
--- a/src/drivers/intel/fsp2_0/upd_display.c
+++ b/src/drivers/intel/fsp2_0/upd_display.c
@@ -10,7 +10,6 @@
*/
#include <arch/cpu.h>
-#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
#include <lib.h>
diff --git a/src/drivers/intel/gma/intel_bios.h b/src/drivers/intel/gma/intel_bios.h
index a6ec487b9b..8bf44eeb8d 100644
--- a/src/drivers/intel/gma/intel_bios.h
+++ b/src/drivers/intel/gma/intel_bios.h
@@ -28,8 +28,6 @@
#ifndef _I830_BIOS_H_
#define _I830_BIOS_H_
-#include <compiler.h>
-
struct vbt_header {
u8 signature[20]; /**< Always starts with 'VBT$' */
u16 version; /**< decimal */
diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h
index e6d8648527..87ae5a3d76 100644
--- a/src/drivers/intel/gma/opregion.h
+++ b/src/drivers/intel/gma/opregion.h
@@ -19,7 +19,6 @@
#define _COMMON_GMA_H_
#include <types.h>
-#include <compiler.h>
#include <commonlib/helpers.h>
/* IGD PCI Configuration register */
diff --git a/src/drivers/intel/mipi_camera/chip.h b/src/drivers/intel/mipi_camera/chip.h
index a66b8ac212..741ae8e1a1 100644
--- a/src/drivers/intel/mipi_camera/chip.h
+++ b/src/drivers/intel/mipi_camera/chip.h
@@ -17,7 +17,6 @@
#define __INTEL_MIPI_CAMERA_CHIP_H__
#include <stdint.h>
-#include <compiler.h>
#define MAX_PWDB_ENTRIES 12
diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c
index cf0f6d89b3..97c97a2909 100644
--- a/src/drivers/intel/wifi/wifi.c
+++ b/src/drivers/intel/wifi/wifi.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/acpi_device.h>
#include <arch/acpigen.h>
#include <console/console.h>
diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c
index eec1591ce2..4dd0dbc434 100644
--- a/src/drivers/mrc_cache/mrc_cache.c
+++ b/src/drivers/mrc_cache/mrc_cache.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <string.h>
#include <boot_device.h>
#include <bootstate.h>
diff --git a/src/drivers/siemens/nc_fpga/nc_fpga.h b/src/drivers/siemens/nc_fpga/nc_fpga.h
index fe6636fdd0..fe5f612a83 100644
--- a/src/drivers/siemens/nc_fpga/nc_fpga.h
+++ b/src/drivers/siemens/nc_fpga/nc_fpga.h
@@ -16,8 +16,6 @@
#ifndef _SIEMENS_NC_FPGA_H_
#define _SIEMENS_NC_FPGA_H_
-#include <compiler.h>
-
#define NC_MAGIC_OFFSET 0x020
#define NC_FPGA_MAGIC 0x4E433746
#define NC_CAP1_OFFSET 0x080
diff --git a/src/drivers/spi/spi-generic.c b/src/drivers/spi/spi-generic.c
index f1b11aedf7..84a42d1c9c 100644
--- a/src/drivers/spi/spi-generic.c
+++ b/src/drivers/spi/spi-generic.c
@@ -15,7 +15,6 @@
*/
#include <assert.h>
-#include <compiler.h>
#include <spi-generic.h>
#include <string.h>
diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c
index bdd40a8a34..aad7610313 100644
--- a/src/drivers/spi/tpm/tpm.c
+++ b/src/drivers/spi/tpm/tpm.c
@@ -17,7 +17,6 @@
#include <arch/early_variables.h>
#include <assert.h>
-#include <compiler.h>
#include <commonlib/endian.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/drivers/usb/ehci.h b/src/drivers/usb/ehci.h
index 33b7854df5..e86286a3e3 100644
--- a/src/drivers/usb/ehci.h
+++ b/src/drivers/usb/ehci.h
@@ -19,8 +19,6 @@
#ifndef EHCI_H
#define EHCI_H
-#include <compiler.h>
-
/* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
/* Section 2.2 Host Controller Capability Registers */
diff --git a/src/drivers/usb/usb_ch9.h b/src/drivers/usb/usb_ch9.h
index d7f39dde24..79f165461b 100644
--- a/src/drivers/usb/usb_ch9.h
+++ b/src/drivers/usb/usb_ch9.h
@@ -17,8 +17,6 @@
#ifndef USB_CH9_H
#define USB_CH9_H
-#include <compiler.h>
-
#define USB_DIR_OUT 0 /* to device */
#define USB_DIR_IN 0x80 /* to host */
diff --git a/src/drivers/vpd/vpd_tables.h b/src/drivers/vpd/vpd_tables.h
index 822ed08b0f..0bd215a5a6 100644
--- a/src/drivers/vpd/vpd_tables.h
+++ b/src/drivers/vpd/vpd_tables.h
@@ -9,7 +9,6 @@
#ifndef __LIB_VPD_TABLES_H__
#define __LIB_VPD_TABLES_H__
-#include <compiler.h>
#include <inttypes.h>
#define VPD_ENTRY_MAGIC "_SM_"
diff --git a/src/ec/google/chromeec/crosec_proto.c b/src/ec/google/chromeec/crosec_proto.c
index 2529854f26..20433473ee 100644
--- a/src/ec/google/chromeec/crosec_proto.c
+++ b/src/ec/google/chromeec/crosec_proto.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <stdint.h>
diff --git a/src/include/console/console.h b/src/include/console/console.h
index ff20782398..a5f7305350 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <rules.h>
#include <arch/cpu.h>
-#include <compiler.h>
#include <console/post_codes.h>
#include <commonlib/loglevel.h>
diff --git a/src/include/console/spi.h b/src/include/console/spi.h
index 42566eb768..64379f8254 100644
--- a/src/include/console/spi.h
+++ b/src/include/console/spi.h
@@ -18,7 +18,6 @@
#include <rules.h>
#include <stdint.h>
-#include <compiler.h>
void spiconsole_init(void);
void spiconsole_tx_byte(unsigned char c);
diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h
index 9661b636cc..33b5939e2f 100644
--- a/src/include/cpu/amd/mtrr.h
+++ b/src/include/cpu/amd/mtrr.h
@@ -38,7 +38,6 @@
#if !defined(__PRE_RAM__) && !defined(__ASSEMBLER__)
-#include <compiler.h>
#include <cpu/x86/msr.h>
void amd_setup_mtrrs(void);
diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h
index 81d2ae7223..c8d26abad4 100644
--- a/src/include/cpu/x86/cache.h
+++ b/src/include/cpu/x86/cache.h
@@ -16,7 +16,6 @@
#ifndef CPU_X86_CACHE
#define CPU_X86_CACHE
-#include <compiler.h>
#include <cpu/x86/cr.h>
#define CR0_CacheDisable (CR0_CD)
diff --git a/src/include/cpu/x86/cr.h b/src/include/cpu/x86/cr.h
index 229a67d422..5d8dcd2ad4 100644
--- a/src/include/cpu/x86/cr.h
+++ b/src/include/cpu/x86/cr.h
@@ -18,7 +18,6 @@
#if !defined(__ASSEMBLER__)
-#include <compiler.h>
#include <stdint.h>
#include <arch/cpu.h>
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 5ac3c5e2e8..be6708fbbc 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -1,7 +1,6 @@
#ifndef CPU_X86_LAPIC_H
#define CPU_X86_LAPIC_H
-#include <compiler.h>
#include <cpu/x86/lapic_def.h>
#include <cpu/x86/msr.h>
#include <halt.h>
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index 290c54a499..85e2131e43 100644
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -1,8 +1,6 @@
#ifndef CPU_X86_MSR_H
#define CPU_X86_MSR_H
-#include <compiler.h>
-
/* Intel SDM: Table 2-1
* IA-32 architectural MSR: Extended Feature Enable Register
*/
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 9942772f0e..3cda35b557 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -22,7 +22,6 @@
#include <arch/cpu.h>
#include <types.h>
-#include <compiler.h>
#define SMM_DEFAULT_BASE 0x30000
#define SMM_DEFAULT_SIZE 0x10000
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index 9e9baa0d60..5e60e8de2d 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -1,7 +1,6 @@
#ifndef PCI_OPS_H
#define PCI_OPS_H
-#include <compiler.h>
#include <stdint.h>
#include <device/device.h>
#include <arch/pci_ops.h>
diff --git a/src/include/elog.h b/src/include/elog.h
index b64953c48b..8aecf2c29b 100644
--- a/src/include/elog.h
+++ b/src/include/elog.h
@@ -16,8 +16,6 @@
#ifndef ELOG_H_
#define ELOG_H_
-#include <compiler.h>
-
/* SMI command code for GSMI event logging */
#define ELOG_GSMI_APM_CNT 0xEF
diff --git a/src/include/halt.h b/src/include/halt.h
index e8f1b51976..117c6c087a 100644
--- a/src/include/halt.h
+++ b/src/include/halt.h
@@ -20,7 +20,6 @@
#ifdef __ROMCC__
#include <lib/halt.c>
#else
-#include <compiler.h>
/**
* halt the system reliably
*/
diff --git a/src/include/memory_info.h b/src/include/memory_info.h
index c9554b8a4b..1b30702c33 100644
--- a/src/include/memory_info.h
+++ b/src/include/memory_info.h
@@ -17,7 +17,6 @@
#define _MEMORY_INFO_H_
#include <stdint.h>
-#include <compiler.h>
#define DIMM_INFO_SERIAL_SIZE 4
#define DIMM_INFO_PART_NUMBER_SIZE 21
diff --git a/src/include/reset.h b/src/include/reset.h
index 48999164bb..cf9d5744b2 100644
--- a/src/include/reset.h
+++ b/src/include/reset.h
@@ -1,8 +1,6 @@
#ifndef RESET_H
#define RESET_H
-#include <compiler.h>
-
/* Generic reset functions. Call from code that wants to trigger a reset. */
/* Super-hard reset specific to some Intel SoCs. */
diff --git a/src/include/sar.h b/src/include/sar.h
index e1e0fcb2d7..9da4dd943c 100644
--- a/src/include/sar.h
+++ b/src/include/sar.h
@@ -15,7 +15,6 @@
#ifndef _SAR_H_
#define _SAR_H_
-#include <compiler.h>
#include <stdint.h>
#define NUM_SAR_LIMITS 4
diff --git a/src/include/smbios.h b/src/include/smbios.h
index 631a1a59be..574b92469f 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -19,7 +19,6 @@
#define SMBIOS_H
#include <types.h>
-#include <compiler.h>
unsigned long smbios_write_tables(unsigned long start);
int smbios_add_string(u8 *start, const char *str);
diff --git a/src/include/vbe.h b/src/include/vbe.h
index ceceff29fb..2c40d0507e 100644
--- a/src/include/vbe.h
+++ b/src/include/vbe.h
@@ -13,7 +13,6 @@
#ifndef VBE_H
#define VBE_H
-#include <compiler.h>
#include <boot/coreboot_tables.h>
// these structs are for input from and output to OF
typedef struct {
diff --git a/src/lib/boot_device.c b/src/lib/boot_device.c
index c5afce7161..efbbedb23e 100644
--- a/src/lib/boot_device.c
+++ b/src/lib/boot_device.c
@@ -14,7 +14,6 @@
*/
#include <boot_device.h>
-#include <compiler.h>
void __weak boot_device_init(void)
{
diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c
index d74bebfe83..f2ada522eb 100644
--- a/src/lib/bootblock.c
+++ b/src/lib/bootblock.c
@@ -16,7 +16,6 @@
#include <arch/exception.h>
#include <bootblock_common.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index ca1fc8477e..9ea7df6ed2 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -20,7 +20,6 @@
#include <boot_device.h>
#include <cbfs.h>
#include <commonlib/compression.h>
-#include <compiler.h>
#include <endian.h>
#include <lib.h>
#include <symbols.h>
diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c
index 2451fca8c7..fd2b46851a 100644
--- a/src/lib/cbmem_common.c
+++ b/src/lib/cbmem_common.c
@@ -14,7 +14,6 @@
*/
#include <console/console.h>
#include <cbmem.h>
-#include <compiler.h>
#include <bootstate.h>
#include <rules.h>
#include <symbols.h>
diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c
index d9716700bb..709752bb23 100644
--- a/src/lib/cbmem_console.c
+++ b/src/lib/cbmem_console.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <console/cbmem_console.h>
#include <console/uart.h>
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 62b3aaa82b..c2ae0949ed 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -16,7 +16,6 @@
*/
#include <arch/cbconfig.h>
-#include <compiler.h>
#include <console/console.h>
#include <console/uart.h>
#include <ip_checksum.h>
diff --git a/src/lib/fallback_boot.c b/src/lib/fallback_boot.c
index a079910262..e4a128e291 100644
--- a/src/lib/fallback_boot.c
+++ b/src/lib/fallback_boot.c
@@ -1,5 +1,4 @@
#include <fallback.h>
-#include <compiler.h>
#include <watchdog.h>
/* Implement platform specific override. */
diff --git a/src/lib/gpio.c b/src/lib/gpio.c
index 4cc039a7da..ab473cb229 100644
--- a/src/lib/gpio.c
+++ b/src/lib/gpio.c
@@ -15,7 +15,6 @@
#include <assert.h>
#include <base3.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <gpio.h>
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 6fd55d7758..a26d6788b5 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -21,7 +21,6 @@
#include <adainit.h>
#include <arch/exception.h>
#include <bootstate.h>
-#include <compiler.h>
#include <console/console.h>
#include <console/post_codes.h>
#include <cbmem.h>
diff --git a/src/lib/imd.c b/src/lib/imd.c
index d17cc815ce..17ec2d9a48 100644
--- a/src/lib/imd.c
+++ b/src/lib/imd.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <assert.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c
index 83d5c1fd17..a7a513f05c 100644
--- a/src/lib/imd_cbmem.c
+++ b/src/lib/imd_cbmem.c
@@ -15,7 +15,6 @@
#include <bootstate.h>
#include <bootmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cbmem.h>
#include <imd.h>
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 1c192d1f8b..e3ddce0a5c 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -17,7 +17,6 @@
#include <stdlib.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <fallback.h>
#include <halt.h>
diff --git a/src/lib/prog_ops.c b/src/lib/prog_ops.c
index 5e670d34c0..2641ac6d05 100644
--- a/src/lib/prog_ops.c
+++ b/src/lib/prog_ops.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <program_loading.h>
/* For each segment of a program loaded this function is called*/
diff --git a/src/lib/reset.c b/src/lib/reset.c
index d5676e5cd4..d8284210c4 100644
--- a/src/lib/reset.c
+++ b/src/lib/reset.c
@@ -14,7 +14,6 @@
*/
#include <arch/cache.h>
-#include <compiler.h>
#include <console/console.h>
#include <halt.h>
#include <reset.h>
diff --git a/src/lib/timer.c b/src/lib/timer.c
index 2cb76ddfca..19b423a398 100644
--- a/src/lib/timer.c
+++ b/src/lib/timer.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <timer.h>
#include <delay.h>
#include <thread.h>
diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c
index 120934d379..105b6961ff 100644
--- a/src/lib/timestamp.c
+++ b/src/lib/timestamp.c
@@ -17,7 +17,6 @@
#include <assert.h>
#include <stddef.h>
#include <stdint.h>
-#include <compiler.h>
#include <console/console.h>
#include <cbmem.h>
#include <symbols.h>
diff --git a/src/lib/wrdd.c b/src/lib/wrdd.c
index a8390cf732..53c3fbbeee 100644
--- a/src/lib/wrdd.c
+++ b/src/lib/wrdd.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <wrdd.h>
uint16_t __weak wifi_regulatory_domain(void)
diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c
index 7e3337460d..f6a3de7d43 100644
--- a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c
+++ b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <string.h>
#include <swab.h>
#include <smbios.h>
diff --git a/src/mainboard/google/cyan/romstage.c b/src/mainboard/google/cyan/romstage.c
index e56e3d2e1a..ef0f489d0d 100644
--- a/src/mainboard/google/cyan/romstage.c
+++ b/src/mainboard/google/cyan/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <soc/romstage.h>
#include <baseboard/variants.h>
#include <chip.h>
diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c
index 106faf4c9c..7682677d69 100644
--- a/src/mainboard/google/cyan/spd/spd.c
+++ b/src/mainboard/google/cyan/spd/spd.c
@@ -16,7 +16,6 @@
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <gpio.h>
#include <lib.h>
diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index 2540bcd47d..bfd1f2f649 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -14,7 +14,6 @@
*/
#include <string.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c
index 50e9931a73..5ec5c25029 100644
--- a/src/mainboard/google/kahlee/romstage.c
+++ b/src/mainboard/google/kahlee/romstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <amdblocks/dimm_spd.h>
#include <baseboard/variants.h>
#include <soc/romstage.h>
diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
index 6d34d4a518..e9cf5c843a 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <amdblocks/agesawrapper.h>
#include <variant/gpio.h>
#include <boardid.h>
diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
index 95064bccdf..6095a08af0 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <baseboard/variants.h>
#include <soc/gpio.h>
#include <soc/southbridge.h>
diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c
index 280140ba4d..67402fb585 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/memory.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <gpio.h> /* src/include/gpio.h */
#include <spd_bin.h>
diff --git a/src/mainboard/google/octopus/mainboard.c b/src/mainboard/google/octopus/mainboard.c
index 6effa7c080..fceb95df70 100644
--- a/src/mainboard/google/octopus/mainboard.c
+++ b/src/mainboard/google/octopus/mainboard.c
@@ -16,7 +16,6 @@
#include <arch/acpi.h>
#include <baseboard/variants.h>
#include <boardid.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c
index 4719a095cb..82d3f7cd1e 100644
--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c
+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c
@@ -17,7 +17,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
/*
* Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
diff --git a/src/mainboard/google/octopus/variants/baseboard/memory.c b/src/mainboard/google/octopus/variants/baseboard/memory.c
index b7a3fc6076..d81d31f980 100644
--- a/src/mainboard/google/octopus/variants/baseboard/memory.c
+++ b/src/mainboard/google/octopus/variants/baseboard/memory.c
@@ -15,7 +15,6 @@
#include <baseboard/variants.h>
#include <boardid.h>
-#include <compiler.h>
#include <gpio.h>
#include <soc/meminit.h>
#include <variant/gpio.h>
diff --git a/src/mainboard/google/octopus/variants/baseboard/nhlt.c b/src/mainboard/google/octopus/variants/baseboard/nhlt.c
index b71aadf9d0..b73bbc9456 100644
--- a/src/mainboard/google/octopus/variants/baseboard/nhlt.c
+++ b/src/mainboard/google/octopus/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/google/poppy/ramstage.c b/src/mainboard/google/poppy/ramstage.c
index ea15aea988..e39afecb9c 100644
--- a/src/mainboard/google/poppy/ramstage.c
+++ b/src/mainboard/google/poppy/ramstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <baseboard/variants.h>
#include <soc/ramstage.h>
diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c
index c1b8e4ce55..c731b52c6e 100644
--- a/src/mainboard/google/poppy/variants/baseboard/gpio.c
+++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c
@@ -16,7 +16,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
/* Pad configuration in ramstage */
/* Leave eSPI pins untouched from default settings */
diff --git a/src/mainboard/google/poppy/variants/baseboard/memory.c b/src/mainboard/google/poppy/variants/baseboard/memory.c
index 95f2b9567c..59a2d6cbd0 100644
--- a/src/mainboard/google/poppy/variants/baseboard/memory.c
+++ b/src/mainboard/google/poppy/variants/baseboard/memory.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <gpio.h>
#include <variant/gpio.h>
diff --git a/src/mainboard/google/poppy/variants/baseboard/nhlt.c b/src/mainboard/google/poppy/variants/baseboard/nhlt.c
index 927cb242da..1014cfb5e9 100644
--- a/src/mainboard/google/poppy/variants/baseboard/nhlt.c
+++ b/src/mainboard/google/poppy/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c
index 2052ae0fbd..28fa327ab7 100644
--- a/src/mainboard/google/poppy/variants/nami/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nami/mainboard.c
@@ -19,7 +19,6 @@
#include <cbfs.h>
#include <chip.h>
#include <commonlib/cbfs_serialized.h>
-#include <compiler.h>
#include <device/device.h>
#include <drivers/intel/gma/opregion.h>
#include <ec/google/chromeec/ec.h>
diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c
index 6db9ac69ec..05af84a03e 100644
--- a/src/mainboard/google/reef/mainboard.c
+++ b/src/mainboard/google/reef/mainboard.c
@@ -16,7 +16,6 @@
#include <arch/acpi.h>
#include <baseboard/variants.h>
#include <boardid.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <ec/ec.h>
diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c
index 8df5873672..054edaa7fb 100644
--- a/src/mainboard/google/reef/variants/baseboard/gpio.c
+++ b/src/mainboard/google/reef/variants/baseboard/gpio.c
@@ -16,7 +16,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
/*
* Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
diff --git a/src/mainboard/google/reef/variants/baseboard/memory.c b/src/mainboard/google/reef/variants/baseboard/memory.c
index 2ee3fb4dd8..a0aad9ecd8 100644
--- a/src/mainboard/google/reef/variants/baseboard/memory.c
+++ b/src/mainboard/google/reef/variants/baseboard/memory.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <gpio.h>
#include <soc/meminit.h>
#include <variant/gpio.h>
diff --git a/src/mainboard/google/reef/variants/baseboard/nhlt.c b/src/mainboard/google/reef/variants/baseboard/nhlt.c
index 188766954e..8e42b930b1 100644
--- a/src/mainboard/google/reef/variants/baseboard/nhlt.c
+++ b/src/mainboard/google/reef/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/google/zoombini/memory.c b/src/mainboard/google/zoombini/memory.c
index 802467c44b..60829b10a5 100644
--- a/src/mainboard/google/zoombini/memory.c
+++ b/src/mainboard/google/zoombini/memory.c
@@ -15,7 +15,6 @@
#include <baseboard/variants.h>
#include <baseboard/gpio.h>
-#include <compiler.h>
#include <gpio.h>
#include <soc/cnl_memcfg_init.h>
diff --git a/src/mainboard/google/zoombini/variants/baseboard/gpio.c b/src/mainboard/google/zoombini/variants/baseboard/gpio.c
index f8c84b44e1..54474053ad 100644
--- a/src/mainboard/google/zoombini/variants/baseboard/gpio.c
+++ b/src/mainboard/google/zoombini/variants/baseboard/gpio.c
@@ -15,7 +15,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
-#include <compiler.h>
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
diff --git a/src/mainboard/google/zoombini/variants/baseboard/nhlt.c b/src/mainboard/google/zoombini/variants/baseboard/nhlt.c
index ffaa6e5c96..84c1ec5ddf 100644
--- a/src/mainboard/google/zoombini/variants/baseboard/nhlt.c
+++ b/src/mainboard/google/zoombini/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
index fa9d0e9419..a1354da7e0 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
@@ -16,7 +16,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
/* Pad configuration in ramstage*/
static const struct pad_config gpio_table[] = {
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
index 6f3629e599..f3be0e8435 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/intel/coffeelake_rvp/memory.c b/src/mainboard/intel/coffeelake_rvp/memory.c
index 7058be4130..a13000cc13 100644
--- a/src/mainboard/intel/coffeelake_rvp/memory.c
+++ b/src/mainboard/intel/coffeelake_rvp/memory.c
@@ -16,7 +16,6 @@
#include <baseboard/variants.h>
#include <baseboard/gpio.h>
-#include <compiler.h>
#include <gpio.h>
#include <soc/cnl_memcfg_init.h>
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c
index 4d53ecade2..161cc5f55f 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c
+++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/intel/galileo/vboot.c b/src/mainboard/intel/galileo/vboot.c
index 8242754a49..3e5e1bafcd 100644
--- a/src/mainboard/intel/galileo/vboot.c
+++ b/src/mainboard/intel/galileo/vboot.c
@@ -14,7 +14,6 @@
#include <assert.h>
#include <bootmode.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c_simple.h>
diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c
index 76c83e1151..1da0d29431 100644
--- a/src/mainboard/intel/glkrvp/chromeos.c
+++ b/src/mainboard/intel/glkrvp/chromeos.c
@@ -15,7 +15,6 @@
#include <baseboard/variants.h>
#include <boot/coreboot_tables.h>
-#include <compiler.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
index f6f31bbcd1..8df1dc4c60 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
@@ -15,7 +15,6 @@
#include <baseboard/variants.h>
#include <boardid.h>
-#include <compiler.h>
#include <ec/google/chromeec/ec.h>
int variant_board_id(void)
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
index a27047e82d..946204321a 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
@@ -16,7 +16,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
/*
* Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
index 56fac2a068..1173ee4745 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <gpio.h>
#include <soc/meminit.h>
#include <variant/gpio.h>
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
index 51da3addb5..5433bd571c 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c
index 1d37d682b2..4305a24567 100644
--- a/src/mainboard/siemens/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/mainboard.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
index c4dcc76005..5ca91efece 100644
--- a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
@@ -15,7 +15,6 @@
*/
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <baseboard/variants.h>
/*
diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c
index 13b7ab8cd3..51bf40e245 100644
--- a/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c
+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c
@@ -16,7 +16,6 @@
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <soc/meminit.h>
const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle = {
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h
index 90b509c328..6ae3e2f75f 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h
@@ -17,7 +17,6 @@
#define PTN3460_H_
#include <stdint.h>
-#include <compiler.h>
#define PTN_SLAVE_ADR 0x20
#define PTN_I2C_CONTROLLER 0
diff --git a/src/mainboard/siemens/mc_tcu3/ptn3460.h b/src/mainboard/siemens/mc_tcu3/ptn3460.h
index 5988c93922..97bcb41941 100644
--- a/src/mainboard/siemens/mc_tcu3/ptn3460.h
+++ b/src/mainboard/siemens/mc_tcu3/ptn3460.h
@@ -16,7 +16,6 @@
#ifndef PTN3460_H_
#define PTN3460_H_
-#include <compiler.h>
#include <delay.h>
#include "lcd_panel.h"
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index 5102b0bb30..f16ef8325b 100644
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -18,7 +18,6 @@
#define AMDFAM10_H
#include <inttypes.h>
-#include <compiler.h>
#include <arch/io.h>
#include <device/device.h>
#include "early_ht.h"
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h
index 6a69cfae8c..5d31d44428 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.h
+++ b/src/northbridge/amd/amdmct/mct/mct_d.h
@@ -23,7 +23,6 @@
#define DQS_TRAIN_DEBUG 0
#include <inttypes.h>
-#include <compiler.h>
#include "mct_d_gcc.h"
#include <console/console.h>
#include <northbridge/amd/amdfam10/debug.h>
diff --git a/src/northbridge/amd/lx/raminit.c b/src/northbridge/amd/lx/raminit.c
index 55dcefde62..8de85a346e 100644
--- a/src/northbridge/amd/lx/raminit.c
+++ b/src/northbridge/amd/lx/raminit.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/lxdef.h>
diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c
index d083883eb3..3021b81358 100644
--- a/src/northbridge/amd/pi/agesawrapper.c
+++ b/src/northbridge/amd/pi/agesawrapper.c
@@ -16,7 +16,6 @@
#include <AGESA.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <delay.h>
#include <cpu/x86/mtrr.h>
#include <FchPlatform.h>
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 4919e65ae5..5dcc1faf85 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -24,7 +24,6 @@
* Steven James 02/06/2003
*/
-#include <compiler.h>
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index d8868a1016..3099a59024 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -202,7 +202,6 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
-#include <compiler.h>
static inline void barrier(void) { asm("" ::: "memory"); }
struct ied_header {
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index f4023e0a6b..319b9e76f0 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -30,8 +30,6 @@
#ifndef PEI_DATA_H
#define PEI_DATA_H
-#include <compiler.h>
-
typedef void (*tx_byte_func)(unsigned char byte);
#define PEI_VERSION 15
diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h
index 7d8555774e..98bdc02afd 100644
--- a/src/northbridge/intel/i945/raminit.h
+++ b/src/northbridge/intel/i945/raminit.h
@@ -16,8 +16,6 @@
#ifndef RAMINIT_H
#define RAMINIT_H
-#include <compiler.h>
-
#define DIMM_SOCKETS 2
#define DIMM_TCO_BASE 0x30
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 490fd09003..33f9c4869e 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -15,7 +15,6 @@
*/
#include <stdlib.h>
-#include <compiler.h>
#include <console/console.h>
#include <string.h>
#include <arch/io.h>
diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h
index 41fc33fd9a..00534ca9a7 100644
--- a/src/northbridge/intel/sandybridge/pei_data.h
+++ b/src/northbridge/intel/sandybridge/pei_data.h
@@ -30,8 +30,6 @@
#ifndef PEI_DATA_H
#define PEI_DATA_H
-#include <compiler.h>
-
typedef struct {
uint16_t mode; // 0: Disable, 1: Enable, 2: Auto, 3: Smart Auto
uint16_t hs_port_switch_mask; // 4 bit mask, 1: switchable, 0: not switchable
diff --git a/src/northbridge/intel/sandybridge/raminit.h b/src/northbridge/intel/sandybridge/raminit.h
index 66a94f48d8..4bc9de610e 100644
--- a/src/northbridge/intel/sandybridge/raminit.h
+++ b/src/northbridge/intel/sandybridge/raminit.h
@@ -16,7 +16,6 @@
#ifndef RAMINIT_H
#define RAMINIT_H
-#include <compiler.h>
#include "pei_data.h"
struct sys_info {
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 39b540ca16..0c3751f57e 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <console/usb.h>
#include <bootmode.h>
diff --git a/src/security/tpm/tss/tcg-2.0/tss_structures.h b/src/security/tpm/tss/tcg-2.0/tss_structures.h
index 11fb71484c..e902f3c985 100644
--- a/src/security/tpm/tss/tcg-2.0/tss_structures.h
+++ b/src/security/tpm/tss/tcg-2.0/tss_structures.h
@@ -12,7 +12,6 @@
* constants and structures needed for functions used in coreboot.
*/
#include <stdint.h>
-#include <compiler.h>
#include <types.h>
#include "../common/tss_common.h"
diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc
index 2b4e7d4c64..781aa5ebd0 100644
--- a/src/security/vboot/Makefile.inc
+++ b/src/security/vboot/Makefile.inc
@@ -91,10 +91,12 @@ endif
endif # CONFIG_VBOOT_SEPARATE_VERSTAGE
VB2_LIB = $(obj)/external/vboot_reference/vboot_fw20.a
-VBOOT_CFLAGS += $(patsubst -I%,-I$(top)/%, $(filter-out -I$(obj), $(filter-out -include $(src)/include/kconfig.h, $(CPPFLAGS_verstage))))
+VBOOT_CFLAGS += $(patsubst -I%,-I$(top)/%,\
+ $(patsubst $(src)/%.h,$(top)/$(src)/%.h,\
+ $(filter-out -I$(obj), $(CPPFLAGS_verstage))))
VBOOT_CFLAGS += $(CFLAGS_verstage)
VBOOT_CFLAGS += $(verstage-c-ccopts)
-VBOOT_CFLAGS += -I$(abspath $(obj)) -include $(top)/src/include/kconfig.h -Wno-missing-prototypes
+VBOOT_CFLAGS += -I$(abspath $(obj)) -Wno-missing-prototypes
VBOOT_CFLAGS += -DVBOOT_DEBUG
$(VB2_LIB): $(obj)/config.h
diff --git a/src/security/vboot/bootmode.c b/src/security/vboot/bootmode.c
index ba7edff501..24b8f9524f 100644
--- a/src/security/vboot/bootmode.c
+++ b/src/security/vboot/bootmode.c
@@ -17,7 +17,6 @@
#include <bootmode.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <rules.h>
#include <string.h>
#include <vb2_api.h>
diff --git a/src/security/vboot/vboot_common.c b/src/security/vboot/vboot_common.c
index ae5bdb634a..901f126ca4 100644
--- a/src/security/vboot/vboot_common.c
+++ b/src/security/vboot/vboot_common.c
@@ -16,7 +16,6 @@
#include <boot/coreboot_tables.h>
#include <boot_device.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/cbmem_console.h>
#include <console/console.h>
#include <fmap.h>
diff --git a/src/security/vboot/vboot_common.h b/src/security/vboot/vboot_common.h
index 8f03788cb6..61f5931fe5 100644
--- a/src/security/vboot/vboot_common.h
+++ b/src/security/vboot/vboot_common.h
@@ -17,7 +17,6 @@
#include <commonlib/region.h>
#include <stdint.h>
-#include <compiler.h>
#include <vboot_api.h>
#include <vboot_struct.h>
diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c
index a0e6a3210d..2fc20fabd4 100644
--- a/src/security/vboot/vboot_logic.c
+++ b/src/security/vboot/vboot_logic.c
@@ -16,7 +16,6 @@
#include <arch/exception.h>
#include <assert.h>
#include <bootmode.h>
-#include <compiler.h>
#include <console/console.h>
#include <console/vtxprintf.h>
#include <delay.h>
diff --git a/src/security/vboot/verstage.c b/src/security/vboot/verstage.c
index fd75250bb4..afd73f11e0 100644
--- a/src/security/vboot/verstage.c
+++ b/src/security/vboot/verstage.c
@@ -15,7 +15,6 @@
#include <arch/exception.h>
#include <arch/hlt.h>
-#include <compiler.h>
#include <console/console.h>
#include <program_loading.h>
#include <security/vboot/vboot_common.h>
diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h
index 6e1a1f0f05..25a564b457 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@@ -19,7 +19,6 @@
#include <amdblocks/agesawrapper.h>
#include <soc/pci_devs.h>
#include <stdint.h>
-#include <compiler.h>
/* Extra, Special Purpose Registers in the PSP PCI Config Space */
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index f2ece80f62..49a2c4c998 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -19,7 +19,6 @@
#include <cpu/x86/mtrr.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <delay.h>
#include <rules.h>
#include <rmodule.h>
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index 56bd8662e7..d136084612 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -15,7 +15,6 @@
*/
#include <cbfs.h>
-#include <compiler.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <timer.h>
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index 027ba4e5d5..5e6c899268 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <amdblocks/BiosCallOuts.h>
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index b4b7acfe88..b469f820b2 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -21,7 +21,6 @@
#include <soc/gpio.h>
#include <soc/southbridge.h>
#include <assert.h>
-#include <compiler.h>
static const struct soc_amd_event gpio_event_table[] = {
{ GPIO_1, GEVENT_19 },
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index 1477358a24..3e6ef3042b 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -25,7 +25,6 @@
#define __SOC_STONEYRIDGE_NVS_H__
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <soc/southbridge.h>
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index a5acaf6f05..555e901501 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -17,7 +17,6 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/acpi.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/stoneyridge/usb.c b/src/soc/amd/stoneyridge/usb.c
index 6007af116b..14feef3e3e 100644
--- a/src/soc/amd/stoneyridge/usb.c
+++ b/src/soc/amd/stoneyridge/usb.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index ba10e35562..9ee6dbb96d 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -20,7 +20,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/mp.h>
diff --git a/src/soc/intel/apollolake/cse.c b/src/soc/intel/apollolake/cse.c
index 8842500fa8..9051dc3304 100644
--- a/src/soc/intel/apollolake/cse.c
+++ b/src/soc/intel/apollolake/cse.c
@@ -22,7 +22,6 @@
#include <soc/pci_devs.h>
#include <device/pci_ops.h>
#include <stdint.h>
-#include <compiler.h>
#define PCI_ME_HFSTS1 0x40
#define PCI_ME_HFSTS2 0x48
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index 3250aeb277..6c37d5977b 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -25,7 +25,6 @@
#define _SOC_APOLLOLAKE_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
typedef struct global_nvs_t {
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index 6de39a068c..c4f1d1b39c 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -19,7 +19,6 @@
#define _SOC_APOLLOLAKE_PM_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/acpi.h>
#include <soc/gpe.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 416877103c..995564d717 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -24,7 +24,6 @@
#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/pae.h>
@@ -52,7 +51,6 @@
#include <timestamp.h>
#include <timer.h>
#include <delay.h>
-#include <compiler.h>
#include "chip.h"
static const uint8_t hob_variable_guid[16] = {
diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c
index 451993df2f..743ab9fbef 100644
--- a/src/soc/intel/baytrail/gpio.c
+++ b/src/soc/intel/baytrail/gpio.c
@@ -14,7 +14,6 @@
*/
#include <device/pci.h>
-#include <compiler.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <soc/pmc.h>
diff --git a/src/soc/intel/baytrail/include/soc/device_nvs.h b/src/soc/intel/baytrail/include/soc/device_nvs.h
index bc6f7ec5de..74e312a858 100644
--- a/src/soc/intel/baytrail/include/soc/device_nvs.h
+++ b/src/soc/intel/baytrail/include/soc/device_nvs.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define LPSS_NVS_SIO_DMA1 0
#define LPSS_NVS_I2C1 1
diff --git a/src/soc/intel/baytrail/include/soc/efi_wrapper.h b/src/soc/intel/baytrail/include/soc/efi_wrapper.h
index 3425aae823..d362494638 100644
--- a/src/soc/intel/baytrail/include/soc/efi_wrapper.h
+++ b/src/soc/intel/baytrail/include/soc/efi_wrapper.h
@@ -29,8 +29,6 @@
#ifndef __EFI_WRAPPER_H__
#define __EFI_WRAPPER_H__
-#include <compiler.h>
-
#define EFI_WRAPPER_VER 2
/* Provide generic x86 calling conventions. */
diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
index 93e80cbab2..474aaea314 100644
--- a/src/soc/intel/baytrail/include/soc/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/io.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h
index d3547c2fb2..d7f4483820 100644
--- a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h
+++ b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h
@@ -28,8 +28,6 @@
#ifndef _MRC_WRAPPER_H_
#define _MRC_WRAPPER_H_
-#include <compiler.h>
-
#define MRC_PARAMS_VER 5
#define NUM_CHANNELS 2
diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h
index 715929d7ea..08ccbf44ff 100644
--- a/src/soc/intel/baytrail/include/soc/nvs.h
+++ b/src/soc/intel/baytrail/include/soc/nvs.h
@@ -18,7 +18,6 @@
#define _BAYTRAIL_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <soc/device_nvs.h>
diff --git a/src/soc/intel/baytrail/include/soc/pmc.h b/src/soc/intel/baytrail/include/soc/pmc.h
index c287d9cea9..bc8e877697 100644
--- a/src/soc/intel/baytrail/include/soc/pmc.h
+++ b/src/soc/intel/baytrail/include/soc/pmc.h
@@ -16,7 +16,6 @@
#ifndef _BAYTRAIL_PMC_H_
#define _BAYTRAIL_PMC_H_
-#include <compiler.h>
#include <arch/acpi.h>
#define IOCOM1 0x3f8
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 83f4227bff..0ef70d020b 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -19,7 +19,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index c42b398594..d81b878e51 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -14,7 +14,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <bootstate.h>
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 0a683fba6b..c11adb9d41 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -22,7 +22,6 @@
#include <arch/smp/mpspec.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/intel/turbo.h>
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index 35cbd156eb..4d135390f6 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -15,7 +15,6 @@
*/
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/braswell/gpio.c b/src/soc/intel/braswell/gpio.c
index 23be45a1c1..a5b289401f 100644
--- a/src/soc/intel/braswell/gpio.c
+++ b/src/soc/intel/braswell/gpio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <soc/gpio.h>
diff --git a/src/soc/intel/braswell/include/soc/device_nvs.h b/src/soc/intel/braswell/include/soc/device_nvs.h
index 8ed534eb91..e98337cdea 100644
--- a/src/soc/intel/braswell/include/soc/device_nvs.h
+++ b/src/soc/intel/braswell/include/soc/device_nvs.h
@@ -18,7 +18,6 @@
#define _SOC_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define LPSS_NVS_SIO_DMA1 0
#define LPSS_NVS_I2C1 1
diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h
index 6b382fc171..894096f59a 100644
--- a/src/soc/intel/braswell/include/soc/gpio.h
+++ b/src/soc/intel/braswell/include/soc/gpio.h
@@ -18,7 +18,6 @@
#define _SOC_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/io.h>
#include <soc/gpio_defs.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/braswell/include/soc/nvs.h b/src/soc/intel/braswell/include/soc/nvs.h
index 05831bb7d1..7f044a5d21 100644
--- a/src/soc/intel/braswell/include/soc/nvs.h
+++ b/src/soc/intel/braswell/include/soc/nvs.h
@@ -19,7 +19,6 @@
#define _SOC_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <rules.h>
#include <soc/device_nvs.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/braswell/include/soc/pm.h b/src/soc/intel/braswell/include/soc/pm.h
index 5ac29f4e30..5d8c332feb 100644
--- a/src/soc/intel/braswell/include/soc/pm.h
+++ b/src/soc/intel/braswell/include/soc/pm.h
@@ -17,7 +17,6 @@
#ifndef _SOC_PM_H_
#define _SOC_PM_H_
-#include <compiler.h>
#include <arch/acpi.h>
#define IOCOM1 0x3f8
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 24d4b8b476..14b412a03f 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -21,7 +21,6 @@
#include <bootstate.h>
#include <cbmem.h>
#include "chip.h"
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index f2d178d11a..0f42a90e2d 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -26,7 +26,6 @@
#include <spi_flash.h>
#include <spi-generic.h>
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
diff --git a/src/soc/intel/broadwell/include/soc/device_nvs.h b/src/soc/intel/broadwell/include/soc/device_nvs.h
index d17b3d461e..c37816cfba 100644
--- a/src/soc/intel/broadwell/include/soc/device_nvs.h
+++ b/src/soc/intel/broadwell/include/soc/device_nvs.h
@@ -17,7 +17,6 @@
#define _BROADWELL_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define SIO_NVS_DMA 0
#define SIO_NVS_I2C0 1
diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h
index d5ff7bb295..66820b2184 100644
--- a/src/soc/intel/broadwell/include/soc/gpio.h
+++ b/src/soc/intel/broadwell/include/soc/gpio.h
@@ -17,7 +17,6 @@
#define _BROADWELL_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#define CROS_GPIO_DEVICE_NAME "PCH-LP"
#define CROS_GPIO_ACPI_DEVICE_NAME "INT3437:00"
diff --git a/src/soc/intel/broadwell/include/soc/me.h b/src/soc/intel/broadwell/include/soc/me.h
index 34b44816e8..a213e37047 100644
--- a/src/soc/intel/broadwell/include/soc/me.h
+++ b/src/soc/intel/broadwell/include/soc/me.h
@@ -16,7 +16,6 @@
#ifndef _BROADWELL_ME_H_
#define _BROADWELL_ME_H_
-#include <compiler.h>
#include <commonlib/loglevel.h>
#define ME_RETRY 100000 /* 1 second */
diff --git a/src/soc/intel/broadwell/include/soc/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h
index 2e51e1bd20..63c7bde23b 100644
--- a/src/soc/intel/broadwell/include/soc/nvs.h
+++ b/src/soc/intel/broadwell/include/soc/nvs.h
@@ -18,7 +18,6 @@
#define _BROADWELL_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <soc/device_nvs.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/broadwell/include/soc/pei_data.h b/src/soc/intel/broadwell/include/soc/pei_data.h
index d12011e797..989ca06733 100644
--- a/src/soc/intel/broadwell/include/soc/pei_data.h
+++ b/src/soc/intel/broadwell/include/soc/pei_data.h
@@ -30,7 +30,6 @@
#define PEI_DATA_H
#include <types.h>
-#include <compiler.h>
#define PEI_VERSION 22
diff --git a/src/soc/intel/broadwell/include/soc/smm.h b/src/soc/intel/broadwell/include/soc/smm.h
index 9a749c9051..75e78337c2 100644
--- a/src/soc/intel/broadwell/include/soc/smm.h
+++ b/src/soc/intel/broadwell/include/soc/smm.h
@@ -17,7 +17,6 @@
#define _BROADWELL_SMM_H_
#include <stdint.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
struct ied_header {
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 142f3b3375..a6691ab9f9 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -20,7 +20,6 @@
#include <arch/cbfs.h>
#include <arch/early_variables.h>
#include <bootmode.h>
-#include <compiler.h>
#include <console/console.h>
#include <cbfs.h>
#include <cbmem.h>
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index 7d862f250d..2b2d603b68 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -13,7 +13,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <bootstate.h>
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 014805f593..6a3324b7fd 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -14,7 +14,6 @@
*/
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index cbc97b22cd..9befdc8fda 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -14,7 +14,6 @@
*/
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/cannonlake/include/soc/nvs.h b/src/soc/intel/cannonlake/include/soc/nvs.h
index 1e5562566d..1cb22faa74 100644
--- a/src/soc/intel/cannonlake/include/soc/nvs.h
+++ b/src/soc/intel/cannonlake/include/soc/nvs.h
@@ -19,7 +19,6 @@
#define _SOC_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
typedef struct global_nvs_t {
diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h
index 1494d561d8..1661ece807 100644
--- a/src/soc/intel/cannonlake/include/soc/pm.h
+++ b/src/soc/intel/cannonlake/include/soc/pm.h
@@ -142,7 +142,6 @@
#include <arch/acpi.h>
#include <arch/io.h>
-#include <compiler.h>
#include <soc/gpe.h>
#include <soc/iomap.h>
#include <soc/smbus.h>
diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c
index 140fbff6a5..eae94cf6c5 100644
--- a/src/soc/intel/cannonlake/reset.c
+++ b/src/soc/intel/cannonlake/reset.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 6f610b6eec..246e0eac05 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -19,7 +19,6 @@
#include <chip.h>
#include <cpu/x86/mtrr.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
#include <intelblocks/chip.h>
diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c
index e0d8bfb8fc..f66706c4cd 100644
--- a/src/soc/intel/common/acpi_wake_source.c
+++ b/src/soc/intel/common/acpi_wake_source.c
@@ -16,7 +16,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <soc/nvs.h>
#include <stdint.h>
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index 8fdaeeeaa9..c2f0594283 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -18,7 +18,6 @@
#include <arch/smp/mpspec.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <cpu/intel/reset.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index dd5cc44845..af49c0a661 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -16,7 +16,6 @@
#include <arch/io.h>
#include <assert.h>
#include <bootstate.h>
-#include <compiler.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/common/block/ebda/ebda.c b/src/soc/intel/common/block/ebda/ebda.c
index 41c77a8f2c..6b0bd6752b 100644
--- a/src/soc/intel/common/block/ebda/ebda.c
+++ b/src/soc/intel/common/block/ebda/ebda.c
@@ -14,7 +14,6 @@
*/
#include <arch/ebda.h>
-#include <compiler.h>
#include <intelblocks/ebda.h>
#include <string.h>
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 74a5cae4bb..47de26990e 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <assert.h>
#include <console/console.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c
index fc7dd46ad8..d4cb9f20ff 100644
--- a/src/soc/intel/common/block/gspi/gspi.c
+++ b/src/soc/intel/common/block/gspi/gspi.c
@@ -17,7 +17,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
#include <assert.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index ef8417a195..dbea58927a 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index c8e8026171..0e975453fd 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -15,7 +15,6 @@
#include <arch/acpi.h>
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 3fb386642a..cfe8011458 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -16,7 +16,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <halt.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c
index bfa11bd177..2d70de273b 100644
--- a/src/soc/intel/common/block/rtc/rtc.c
+++ b/src/soc/intel/common/block/rtc/rtc.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <intelblocks/pcr.h>
#include <intelblocks/rtc.h>
#include <soc/pcr_ids.h>
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index f90ac578e3..9e8d346d24 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -16,7 +16,6 @@
#include <arch/hlt.h>
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c
index 9028952286..e38d47852a 100644
--- a/src/soc/intel/common/block/sram/sram.c
+++ b/src/soc/intel/common/block/sram/sram.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 225914c5b5..c25cab7ba5 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -15,7 +15,6 @@
#include <arch/io.h>
#include <cbmem.h>
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 12b99e737e..d964b90b38 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -15,7 +15,6 @@
#include <arch/acpi.h>
#include <assert.h>
-#include <compiler.h>
#include <cbmem.h>
#include <console/uart.h>
#include <device/device.h>
diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c
index eb330ee6ee..119decd71f 100644
--- a/src/soc/intel/common/block/xdci/xdci.c
+++ b/src/soc/intel/common/block/xdci/xdci.c
@@ -15,7 +15,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index c38d19f034..0f4868a969 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c
index 541a7b4d43..77f8c1e227 100644
--- a/src/soc/intel/common/mma.c
+++ b/src/soc/intel/common/mma.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <bootstate.h>
#include <cbfs.h>
#include <cbmem.h>
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c
index ab52dc8d04..9eaa2cb048 100644
--- a/src/soc/intel/common/vbt.c
+++ b/src/soc/intel/common/vbt.c
@@ -14,7 +14,6 @@
*/
#include <cbfs.h>
-#include <compiler.h>
#include <console/console.h>
#include <arch/acpi.h>
#include <bootmode.h>
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 6a947ff83f..71e396004f 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -19,7 +19,6 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
-#include <compiler.h>
#include <cpu/x86/smm.h>
#include <string.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/fiamux.c b/src/soc/intel/denverton_ns/fiamux.c
index 418ccfa322..fc18a41312 100644
--- a/src/soc/intel/denverton_ns/fiamux.c
+++ b/src/soc/intel/denverton_ns/fiamux.c
@@ -15,7 +15,6 @@
*
*/
-#include <compiler.h>
#include <console/console.h>
#include <soc/fiamux.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index 3da349a63f..cf4ae7c1ed 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -15,7 +15,6 @@
*/
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <reset.h>
diff --git a/src/soc/intel/fsp_baytrail/gpio.c b/src/soc/intel/fsp_baytrail/gpio.c
index 72ba517d52..3cc69b9441 100644
--- a/src/soc/intel/fsp_baytrail/gpio.c
+++ b/src/soc/intel/fsp_baytrail/gpio.c
@@ -14,7 +14,6 @@
*/
#include <device/pci.h>
-#include <compiler.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <soc/pmc.h>
diff --git a/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
index 8eff8cdb6f..ec1e568bfd 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define LPSS_NVS_SIO_DMA1 0
#define LPSS_NVS_I2C1 1
diff --git a/src/soc/intel/fsp_baytrail/include/soc/gpio.h b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
index 767755454b..13013db121 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/gpio.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/io.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/fsp_baytrail/include/soc/nvs.h b/src/soc/intel/fsp_baytrail/include/soc/nvs.h
index f0bf888add..d42763a5ac 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/nvs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/nvs.h
@@ -17,7 +17,6 @@
#ifndef _BAYTRAIL_NVS_H_
#define _BAYTRAIL_NVS_H_
-#include <compiler.h>
#include <soc/device_nvs.h>
typedef struct {
diff --git a/src/soc/intel/fsp_baytrail/include/soc/pmc.h b/src/soc/intel/fsp_baytrail/include/soc/pmc.h
index 9bafdc2fcf..b28b195c87 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/pmc.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/pmc.h
@@ -17,7 +17,6 @@
#ifndef _BAYTRAIL_PMC_H_
#define _BAYTRAIL_PMC_H_
-#include <compiler.h>
#include <arch/acpi.h>
#define IOCOM1 0x3f8
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index d8b1d55397..26d2281a68 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -16,7 +16,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <commonlib/helpers.h>
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h b/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h
index 07deeb08d6..1159d03910 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h
@@ -16,7 +16,6 @@
#define FSP_BROADWELL_DE_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
/* Chipset owned GPIO configuration registers */
#define GPIO_1_USE_SEL 0x00
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
index 2a737aca18..505feaf66d 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
@@ -18,7 +18,6 @@
#define _BROADWELL_SMM_H_
#include <stdint.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
struct ied_header {
diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index 1b1589db5b..a778aa927a 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -16,7 +16,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <delay.h>
diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c
index 100257bd7a..b2bb572800 100644
--- a/src/soc/intel/quark/gpio_i2c.c
+++ b/src/soc/intel/quark/gpio_i2c.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/quark/include/soc/pei_wrapper.h b/src/soc/intel/quark/include/soc/pei_wrapper.h
index 9e63a72ead..c177c86e9a 100644
--- a/src/soc/intel/quark/include/soc/pei_wrapper.h
+++ b/src/soc/intel/quark/include/soc/pei_wrapper.h
@@ -31,7 +31,6 @@
#define _PEI_WRAPPER_H_
#include <types.h>
-#include <compiler.h>
#define PEI_VERSION 22
diff --git a/src/soc/intel/quark/include/soc/pm.h b/src/soc/intel/quark/include/soc/pm.h
index ae19cc6c9d..c682a24300 100644
--- a/src/soc/intel/quark/include/soc/pm.h
+++ b/src/soc/intel/quark/include/soc/pm.h
@@ -18,7 +18,6 @@
#define _SOC_PM_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/acpi.h>
struct chipset_power_state {
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index d2ec7e7185..86dcc48e20 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -23,7 +23,6 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index c2c0745565..039d45a507 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -21,7 +21,6 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <chip.h>
-#include <compiler.h>
#include <bootstate.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/skylake/include/soc/device_nvs.h b/src/soc/intel/skylake/include/soc/device_nvs.h
index 2b7d1267fc..4dbc99a075 100644
--- a/src/soc/intel/skylake/include/soc/device_nvs.h
+++ b/src/soc/intel/skylake/include/soc/device_nvs.h
@@ -18,7 +18,6 @@
#define _SOC_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define SIO_NVS_I2C0 0
#define SIO_NVS_I2C1 1
diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h
index 590bfb722d..5a9acd51f3 100644
--- a/src/soc/intel/skylake/include/soc/me.h
+++ b/src/soc/intel/skylake/include/soc/me.h
@@ -18,8 +18,6 @@
#ifndef _SKYLAKE_ME_H_
#define _SKYLAKE_ME_H_
-#include <compiler.h>
-
/*
* Management Engine PCI registers
*/
diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h
index 53fdded8e9..7102a78a32 100644
--- a/src/soc/intel/skylake/include/soc/nvs.h
+++ b/src/soc/intel/skylake/include/soc/nvs.h
@@ -19,7 +19,6 @@
#define _SOC_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <rules.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/skylake/include/soc/pei_data.h b/src/soc/intel/skylake/include/soc/pei_data.h
index 58485837c6..02e04c6c02 100644
--- a/src/soc/intel/skylake/include/soc/pei_data.h
+++ b/src/soc/intel/skylake/include/soc/pei_data.h
@@ -31,7 +31,6 @@
#define _PEI_DATA_H_
#include <types.h>
-#include <compiler.h>
#define PEI_VERSION 22
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index b7d6446543..47e3941531 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -17,7 +17,6 @@
#ifndef _SOC_PM_H_
#define _SOC_PM_H_
-#include <compiler.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <soc/gpe.h>
diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h
index 0f857e05ce..8195440952 100644
--- a/src/soc/intel/skylake/include/soc/smm.h
+++ b/src/soc/intel/skylake/include/soc/smm.h
@@ -18,7 +18,6 @@
#define _SOC_SMM_H_
#include <stdint.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
#include <fsp/memmap.h>
#include <intelblocks/smihandler.h>
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index 5a4fe6b629..6baa568efa 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -16,7 +16,6 @@
#include <arch/io.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 45fb2d0ef3..0945780c9f 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -18,7 +18,6 @@
#include <arch/io.h>
#include <arch/symbols.h>
#include <assert.h>
-#include <compiler.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cbmem.h>
diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c
index 27a03e3317..44670702de 100644
--- a/src/soc/mediatek/common/mmu_operations.c
+++ b/src/soc/mediatek/common/mmu_operations.c
@@ -14,7 +14,6 @@
*/
#include <arch/mmu.h>
-#include <compiler.h>
#include <symbols.h>
#include <soc/emi.h>
#include <soc/mmu_operations.h>
diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c
index 6e4315c7cf..b05d29e0bf 100644
--- a/src/soc/mediatek/common/timer.c
+++ b/src/soc/mediatek/common/timer.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <timer.h>
#include <delay.h>
diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c
index cfc469bed6..bc8053c6ab 100644
--- a/src/soc/mediatek/common/uart.c
+++ b/src/soc/mediatek/common/uart.c
@@ -19,7 +19,6 @@
#include <console/uart.h>
#include <drivers/uart/uart8250reg.h>
#include <stdint.h>
-#include <compiler.h>
#include <soc/addressmap.h>
diff --git a/src/soc/nvidia/tegra124/include/soc/clk_rst.h b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
index 7cac4ba319..07e710a9f3 100644
--- a/src/soc/nvidia/tegra124/include/soc/clk_rst.h
+++ b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
@@ -16,8 +16,6 @@
#ifndef _TEGRA124_CLK_RST_H_
#define _TEGRA124_CLK_RST_H_
-#include <compiler.h>
-
/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
struct __packed clk_rst_ctlr {
u32 rst_src; /* _RST_SOURCE, 0x000 */
diff --git a/src/soc/nvidia/tegra124/include/soc/dma.h b/src/soc/nvidia/tegra124/include/soc/dma.h
index 4cb1dea616..42c70275f5 100644
--- a/src/soc/nvidia/tegra124/include/soc/dma.h
+++ b/src/soc/nvidia/tegra124/include/soc/dma.h
@@ -19,7 +19,6 @@
#define __NVIDIA_TEGRA124_DMA_H__
#include <inttypes.h>
-#include <compiler.h>
#include <soc/addressmap.h>
/*
diff --git a/src/soc/nvidia/tegra124/include/soc/emc.h b/src/soc/nvidia/tegra124/include/soc/emc.h
index 1311f9efa2..8e190f9358 100644
--- a/src/soc/nvidia/tegra124/include/soc/emc.h
+++ b/src/soc/nvidia/tegra124/include/soc/emc.h
@@ -19,7 +19,6 @@
#include <stddef.h>
#include <stdint.h>
-#include <compiler.h>
enum {
EMC_PIN_RESET_MASK = 1 << 8,
diff --git a/src/soc/nvidia/tegra124/include/soc/spi.h b/src/soc/nvidia/tegra124/include/soc/spi.h
index 80ced37689..875e88032a 100644
--- a/src/soc/nvidia/tegra124/include/soc/spi.h
+++ b/src/soc/nvidia/tegra124/include/soc/spi.h
@@ -19,7 +19,6 @@
#include <spi-generic.h>
#include <soc/dma.h>
#include <stddef.h>
-#include <compiler.h>
struct tegra_spi_regs {
u32 command1; /* 0x000: SPI_COMMAND1 */
diff --git a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
index a8b2e69ea0..7cc320405a 100644
--- a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <compiler.h>
/* Function unit addresses. */
enum {
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index 5cb8112d81..50c395658a 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <console/console.h> /* for __console definition */
diff --git a/src/soc/nvidia/tegra210/bootblock.c b/src/soc/nvidia/tegra210/bootblock.c
index 4d1ddf5d60..353644710d 100644
--- a/src/soc/nvidia/tegra210/bootblock.c
+++ b/src/soc/nvidia/tegra210/bootblock.c
@@ -17,7 +17,6 @@
#include <arch/hlt.h>
#include <arch/stages.h>
#include <bootblock_common.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <program_loading.h>
diff --git a/src/soc/nvidia/tegra210/funitcfg.c b/src/soc/nvidia/tegra210/funitcfg.c
index e8d0c9754d..b4319d59d6 100644
--- a/src/soc/nvidia/tegra210/funitcfg.c
+++ b/src/soc/nvidia/tegra210/funitcfg.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/funitcfg.h>
diff --git a/src/soc/nvidia/tegra210/include/soc/clk_rst.h b/src/soc/nvidia/tegra210/include/soc/clk_rst.h
index 652bcaaf27..42eebedbc7 100644
--- a/src/soc/nvidia/tegra210/include/soc/clk_rst.h
+++ b/src/soc/nvidia/tegra210/include/soc/clk_rst.h
@@ -17,7 +17,6 @@
#define _TEGRA210_CLK_RST_H_
#include <stdint.h>
#include <stddef.h>
-#include <compiler.h>
/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
struct __packed clk_rst_ctlr {
diff --git a/src/soc/nvidia/tegra210/include/soc/clst_clk.h b/src/soc/nvidia/tegra210/include/soc/clst_clk.h
index 0b9b18dc06..661fd1d849 100644
--- a/src/soc/nvidia/tegra210/include/soc/clst_clk.h
+++ b/src/soc/nvidia/tegra210/include/soc/clst_clk.h
@@ -16,8 +16,6 @@
#ifndef _TEGRA210_CLST_CLK_H_
#define _TEGRA210_CLST_CLK_H_
-#include <compiler.h>
-
/* Cluster Clock (CLUSTER_CLOCKS_PUBLIC_) regs */
struct __packed clst_clk_ctlr {
u32 pllx_base; /* _PLLX_BASE, 0x000 */
diff --git a/src/soc/nvidia/tegra210/include/soc/dma.h b/src/soc/nvidia/tegra210/include/soc/dma.h
index f8bd92befd..1093479d5f 100644
--- a/src/soc/nvidia/tegra210/include/soc/dma.h
+++ b/src/soc/nvidia/tegra210/include/soc/dma.h
@@ -18,7 +18,6 @@
#define __NVIDIA_TEGRA210_DMA_H__
#include <inttypes.h>
-#include <compiler.h>
#include <soc/addressmap.h>
/*
diff --git a/src/soc/nvidia/tegra210/include/soc/emc.h b/src/soc/nvidia/tegra210/include/soc/emc.h
index 8ba23a0bb0..289aa72612 100644
--- a/src/soc/nvidia/tegra210/include/soc/emc.h
+++ b/src/soc/nvidia/tegra210/include/soc/emc.h
@@ -19,7 +19,6 @@
#include <stddef.h>
#include <stdint.h>
-#include <compiler.h>
enum {
EMC_PIN_RESET_MASK = 1 << 8,
diff --git a/src/soc/nvidia/tegra210/include/soc/spi.h b/src/soc/nvidia/tegra210/include/soc/spi.h
index 7508792d76..46c1c3c063 100644
--- a/src/soc/nvidia/tegra210/include/soc/spi.h
+++ b/src/soc/nvidia/tegra210/include/soc/spi.h
@@ -17,7 +17,6 @@
#ifndef __NVIDIA_TEGRA210_SPI_H__
#define __NVIDIA_TEGRA210_SPI_H__
-#include <compiler.h>
#include <soc/dma.h>
#include <spi-generic.h>
#include <stddef.h>
diff --git a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
index 108b3b07de..51e75f5da9 100644
--- a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <compiler.h>
/* Function unit addresses. */
enum {
diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c
index 8958a6bb1e..07bf5d43f8 100644
--- a/src/soc/nvidia/tegra210/romstage.c
+++ b/src/soc/nvidia/tegra210/romstage.c
@@ -17,7 +17,6 @@
#include <arch/stages.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/cbmem_console.h>
#include <console/console.h>
#include <lib.h>
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index 97dc740ebf..b7cec3d171 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -19,7 +19,6 @@
#include <console/uart.h>
#include <drivers/uart/uart8250reg.h>
#include <stdint.h>
-#include <compiler.h>
struct tegra210_uart {
union {
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
index dbff384cd7..05a17c2e73 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
@@ -32,7 +32,6 @@
#define _IPQ40XX_CDP_H_
#include <types.h>
-#include <compiler.h>
unsigned smem_get_board_machtype(void);
diff --git a/src/soc/qualcomm/ipq40xx/lcc.c b/src/soc/qualcomm/ipq40xx/lcc.c
index 5d3738c1af..caddf19642 100644
--- a/src/soc/qualcomm/ipq40xx/lcc.c
+++ b/src/soc/qualcomm/ipq40xx/lcc.c
@@ -29,7 +29,6 @@
#include <stdlib.h>
#include <stdint.h>
-#include <compiler.h>
#include <delay.h>
#include <console/console.h>
#include <soc/clock.h>
diff --git a/src/soc/qualcomm/ipq806x/include/soc/cdp.h b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
index f6afb313cc..89636ace18 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
@@ -17,7 +17,6 @@
#define _IPQ806X_CDP_H_
#include <types.h>
-#include <compiler.h>
unsigned smem_get_board_machtype(void);
diff --git a/src/soc/qualcomm/ipq806x/lcc.c b/src/soc/qualcomm/ipq806x/lcc.c
index 99994e928b..6aefea2351 100644
--- a/src/soc/qualcomm/ipq806x/lcc.c
+++ b/src/soc/qualcomm/ipq806x/lcc.c
@@ -29,7 +29,6 @@
#include <stdlib.h>
#include <stdint.h>
-#include <compiler.h>
#include <delay.h>
#include <console/console.h>
#include <soc/clock.h>
diff --git a/src/soc/samsung/exynos5250/i2c.c b/src/soc/samsung/exynos5250/i2c.c
index 19ef667896..f1bc3a41c9 100644
--- a/src/soc/samsung/exynos5250/i2c.c
+++ b/src/soc/samsung/exynos5250/i2c.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
diff --git a/src/soc/samsung/exynos5250/include/soc/power.h b/src/soc/samsung/exynos5250/include/soc/power.h
index b5a4c33e1e..297ee19a4c 100644
--- a/src/soc/samsung/exynos5250/include/soc/power.h
+++ b/src/soc/samsung/exynos5250/include/soc/power.h
@@ -18,7 +18,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5250_POWER_H
#define CPU_SAMSUNG_EXYNOS5250_POWER_H
-#include <compiler.h>
#include <soc/cpu.h>
/* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */
diff --git a/src/soc/samsung/exynos5420/i2c.c b/src/soc/samsung/exynos5420/i2c.c
index dd5ffd20d0..cef9f5d150 100644
--- a/src/soc/samsung/exynos5420/i2c.c
+++ b/src/soc/samsung/exynos5420/i2c.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
diff --git a/src/soc/samsung/exynos5420/include/soc/dmc.h b/src/soc/samsung/exynos5420/include/soc/dmc.h
index b19b660936..e068255f96 100644
--- a/src/soc/samsung/exynos5420/include/soc/dmc.h
+++ b/src/soc/samsung/exynos5420/include/soc/dmc.h
@@ -14,8 +14,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5420_DMC_H
#define CPU_SAMSUNG_EXYNOS5420_DMC_H
-#include <compiler.h>
-
#define DMC_INTERLEAVE_SIZE 0x1f
#define PAD_RETENTION_DRAM_COREBLK_VAL 0x10000000
diff --git a/src/soc/samsung/exynos5420/include/soc/power.h b/src/soc/samsung/exynos5420/include/soc/power.h
index c5709a55e9..9b56fe5b1e 100644
--- a/src/soc/samsung/exynos5420/include/soc/power.h
+++ b/src/soc/samsung/exynos5420/include/soc/power.h
@@ -18,7 +18,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5420_POWER_H
#define CPU_SAMSUNG_EXYNOS5420_POWER_H
-#include <compiler.h>
#include <soc/cpu.h>
/* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */
diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c
index 6caffee9b5..1d1ac13890 100644
--- a/src/southbridge/amd/sb700/sata.c
+++ b/src/southbridge/amd/sb700/sata.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <delay.h>
diff --git a/src/southbridge/intel/bd82x6x/me.h b/src/southbridge/intel/bd82x6x/me.h
index b0f2a6e90b..270886485d 100644
--- a/src/southbridge/intel/bd82x6x/me.h
+++ b/src/southbridge/intel/bd82x6x/me.h
@@ -17,8 +17,6 @@
#ifndef _INTEL_ME_H
#define _INTEL_ME_H
-#include <compiler.h>
-
#define ME_RETRY 100000 /* 1 second */
#define ME_DELAY 10 /* 10 us */
diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h
index 537139dde1..655851105e 100644
--- a/src/southbridge/intel/bd82x6x/nvs.h
+++ b/src/southbridge/intel/bd82x6x/nvs.h
@@ -15,7 +15,6 @@
*/
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <stdint.h>
#include "vendorcode/google/chromeos/gnvs.h"
diff --git a/src/southbridge/intel/common/gpio.h b/src/southbridge/intel/common/gpio.h
index 97b7783400..019009ef18 100644
--- a/src/southbridge/intel/common/gpio.h
+++ b/src/southbridge/intel/common/gpio.h
@@ -17,7 +17,6 @@
#define INTEL_COMMON_GPIO_H
#include <stdint.h>
-#include <compiler.h>
/* ICH7 GPIOBASE */
#define GPIO_USE_SEL 0x00
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 0fd8ab0506..8dce9bb129 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -17,7 +17,6 @@
#include <types.h>
#include <arch/io.h>
#include <arch/acpi.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 180a629e32..31cdb3391d 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
-#include <compiler.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <delay.h>
diff --git a/src/southbridge/intel/fsp_bd82x6x/gpio.h b/src/southbridge/intel/fsp_bd82x6x/gpio.h
index 3279be8ee5..a46a8fee33 100644
--- a/src/southbridge/intel/fsp_bd82x6x/gpio.h
+++ b/src/southbridge/intel/fsp_bd82x6x/gpio.h
@@ -17,8 +17,6 @@
#ifndef INTEL_BD82X6X_GPIO_H
#define INTEL_BD82X6X_GPIO_H
-#include <compiler.h>
-
#define GPIO_MODE_NATIVE 0
#define GPIO_MODE_GPIO 1
#define GPIO_MODE_NONE 1
diff --git a/src/southbridge/intel/fsp_bd82x6x/me.h b/src/southbridge/intel/fsp_bd82x6x/me.h
index b0f2a6e90b..270886485d 100644
--- a/src/southbridge/intel/fsp_bd82x6x/me.h
+++ b/src/southbridge/intel/fsp_bd82x6x/me.h
@@ -17,8 +17,6 @@
#ifndef _INTEL_ME_H
#define _INTEL_ME_H
-#include <compiler.h>
-
#define ME_RETRY 100000 /* 1 second */
#define ME_DELAY 10 /* 10 us */
diff --git a/src/southbridge/intel/fsp_bd82x6x/nvs.h b/src/southbridge/intel/fsp_bd82x6x/nvs.h
index c8af5b989a..6d51ec114b 100644
--- a/src/southbridge/intel/fsp_bd82x6x/nvs.h
+++ b/src/southbridge/intel/fsp_bd82x6x/nvs.h
@@ -15,7 +15,6 @@
*/
#include <commonlib/helpers.h>
-#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
typedef struct global_nvs_t {
diff --git a/src/southbridge/intel/fsp_i89xx/gpio.h b/src/southbridge/intel/fsp_i89xx/gpio.h
index b89ab3ed37..95cf70a78a 100644
--- a/src/southbridge/intel/fsp_i89xx/gpio.h
+++ b/src/southbridge/intel/fsp_i89xx/gpio.h
@@ -17,8 +17,6 @@
#ifndef INTEL_I89XX_GPIO_H
#define INTEL_I89XX_GPIO_H
-#include <compiler.h>
-
#define GPIO_MODE_NATIVE 0
#define GPIO_MODE_GPIO 1
#define GPIO_MODE_NONE 1
diff --git a/src/southbridge/intel/fsp_i89xx/me.h b/src/southbridge/intel/fsp_i89xx/me.h
index b0f2a6e90b..270886485d 100644
--- a/src/southbridge/intel/fsp_i89xx/me.h
+++ b/src/southbridge/intel/fsp_i89xx/me.h
@@ -17,8 +17,6 @@
#ifndef _INTEL_ME_H
#define _INTEL_ME_H
-#include <compiler.h>
-
#define ME_RETRY 100000 /* 1 second */
#define ME_DELAY 10 /* 10 us */
diff --git a/src/southbridge/intel/fsp_i89xx/nvs.h b/src/southbridge/intel/fsp_i89xx/nvs.h
index c8af5b989a..6d51ec114b 100644
--- a/src/southbridge/intel/fsp_i89xx/nvs.h
+++ b/src/southbridge/intel/fsp_i89xx/nvs.h
@@ -15,7 +15,6 @@
*/
#include <commonlib/helpers.h>
-#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
typedef struct global_nvs_t {
diff --git a/src/southbridge/intel/fsp_rangeley/gpio.h b/src/southbridge/intel/fsp_rangeley/gpio.h
index d8fbcb985d..1a916f4dcc 100644
--- a/src/southbridge/intel/fsp_rangeley/gpio.h
+++ b/src/southbridge/intel/fsp_rangeley/gpio.h
@@ -17,8 +17,6 @@
#ifndef INTEL_RANGELEY_GPIO_H
#define INTEL_RANGELEY_GPIO_H
-#include <compiler.h>
-
#define GPIO_MODE_NATIVE 0
#define GPIO_MODE_GPIO 1
#define GPIO_MODE_NONE 1
diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h
index fd3329051d..12de76999d 100644
--- a/src/southbridge/intel/fsp_rangeley/nvs.h
+++ b/src/southbridge/intel/fsp_rangeley/nvs.h
@@ -14,8 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
-
typedef struct {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 0512bcf19f..98ae708070 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
-#include <compiler.h>
#include <commonlib/helpers.h>
#include <delay.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/i82801dx/nvs.h b/src/southbridge/intel/i82801dx/nvs.h
index bdc6b45a56..3a72f4d7e9 100644
--- a/src/southbridge/intel/i82801dx/nvs.h
+++ b/src/southbridge/intel/i82801dx/nvs.h
@@ -13,8 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
-
typedef struct {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h
index 483eddb420..04e62db809 100644
--- a/src/southbridge/intel/i82801gx/nvs.h
+++ b/src/southbridge/intel/i82801gx/nvs.h
@@ -13,8 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
-
typedef struct {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h
index 483eddb420..04e62db809 100644
--- a/src/southbridge/intel/i82801ix/nvs.h
+++ b/src/southbridge/intel/i82801ix/nvs.h
@@ -13,8 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
-
typedef struct {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
diff --git a/src/southbridge/intel/i82801jx/nvs.h b/src/southbridge/intel/i82801jx/nvs.h
index 16c49bb18b..ca66985746 100644
--- a/src/southbridge/intel/i82801jx/nvs.h
+++ b/src/southbridge/intel/i82801jx/nvs.h
@@ -13,8 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
-
typedef struct {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
diff --git a/src/southbridge/intel/ibexpeak/me.h b/src/southbridge/intel/ibexpeak/me.h
index 6423d8d29d..be65cc5454 100644
--- a/src/southbridge/intel/ibexpeak/me.h
+++ b/src/southbridge/intel/ibexpeak/me.h
@@ -17,8 +17,6 @@
#ifndef _INTEL_ME_H
#define _INTEL_ME_H
-#include <compiler.h>
-
#define ME_RETRY 100000 /* 1 second */
#define ME_DELAY 10 /* 10 us */
diff --git a/src/southbridge/intel/ibexpeak/nvs.h b/src/southbridge/intel/ibexpeak/nvs.h
index 7b9fd249fc..36db12c043 100644
--- a/src/southbridge/intel/ibexpeak/nvs.h
+++ b/src/southbridge/intel/ibexpeak/nvs.h
@@ -15,7 +15,6 @@
*/
#include <commonlib/helpers.h>
-#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
typedef struct global_nvs_t {
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.h b/src/southbridge/intel/lynxpoint/lp_gpio.h
index 6c21db228e..fa6d700fd9 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.h
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.h
@@ -16,8 +16,6 @@
#ifndef INTEL_LYNXPOINT_LP_GPIO_H
#define INTEL_LYNXPOINT_LP_GPIO_H
-#include <compiler.h>
-
/* LynxPoint LP GPIOBASE Registers */
#define GPIO_OWNER(set) (0x00 + ((set) * 4))
#define GPIO_PIRQ_APIC_EN 0x10
diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h
index cef2e55a24..775b4eced6 100644
--- a/src/southbridge/intel/lynxpoint/me.h
+++ b/src/southbridge/intel/lynxpoint/me.h
@@ -17,8 +17,6 @@
#ifndef _INTEL_ME_H
#define _INTEL_ME_H
-#include <compiler.h>
-
#define ME_RETRY 100000 /* 1 second */
#define ME_DELAY 10 /* 10 us */
diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h
index fd0d8bc961..397cdf2289 100644
--- a/src/southbridge/intel/lynxpoint/nvs.h
+++ b/src/southbridge/intel/lynxpoint/nvs.h
@@ -15,7 +15,6 @@
*/
#include <commonlib/helpers.h>
-#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
typedef struct global_nvs_t {
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.h b/src/southbridge/ricoh/rl5c476/rl5c476.h
index 0639fd1193..646650a42a 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.h
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.h
@@ -17,7 +17,6 @@
/* rl5c476 routines and defines*/
-#include <compiler.h>
#include <stdint.h>
diff --git a/src/vendorcode/amd/pi/00670F00/Makefile.inc b/src/vendorcode/amd/pi/00670F00/Makefile.inc
index 61d0480785..0e6f2afd1c 100644
--- a/src/vendorcode/amd/pi/00670F00/Makefile.inc
+++ b/src/vendorcode/amd/pi/00670F00/Makefile.inc
@@ -79,6 +79,7 @@ $(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $
$(AGESA_INC) \
-include $(src)/include/rules.h \
-include $(src)/include/kconfig.h \
+ -include $(src)/commonlib/include/commonlib/compiler.h \
-o $$@ \
$(agesa_src_path)/$(notdir $1)
diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc
index 19fd5d09a9..4c8db6ab50 100644
--- a/src/vendorcode/amd/pi/Makefile.inc
+++ b/src/vendorcode/amd/pi/Makefile.inc
@@ -100,7 +100,9 @@ $(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $
@printf " CC $$(subst $(obj)/,,$$(@))\n"
$(CC_libagesa) -c -MMD $(CFLAGS_libagesa) $(AGESA_CFLAGS) \
$(AGESA_INC) \
- -include $(src)/include/rules.h -include $(src)/include/kconfig.h \
+ -include $(src)/include/rules.h \
+ -include $(src)/include/kconfig.h \
+ -include $(src)/commonlib/include/commonlib/compiler.h \
-o $$@ \
$(agesa_src_path)/$(notdir $1)
diff --git a/src/vendorcode/google/chromeos/gnvs.h b/src/vendorcode/google/chromeos/gnvs.h
index 77c2f0aab8..7e97bfaa75 100644
--- a/src/vendorcode/google/chromeos/gnvs.h
+++ b/src/vendorcode/google/chromeos/gnvs.h
@@ -16,8 +16,6 @@
#ifndef __VENDORCODE_GOOGLE_CHROMEOS_GNVS_H
#define __VENDORCODE_GOOGLE_CHROMEOS_GNVS_H
-#include <compiler.h>
-
#define BOOT_REASON_OTHER 0
#define BOOT_REASON_S3DIAG 9