diff options
| author | V Sowmya <v.sowmya@intel.com> | 2022-09-15 08:06:49 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-30 13:16:13 +0000 |
| commit | a88d5e3bcafdbc8d2cc2491a04de839eef4f6a4e (patch) | |
| tree | e26221ff107a994d5bfbcde42b7a8b9ed11292b0 /src | |
| parent | 662bbcfe7280b1541c4ee1c4d2ad4194b363a1df (diff) | |
mb/intel/adlrvp_n: Disable the External 1.05v VR in S0
Disable the external 1.05v VR in S0 as a fix for the
display flicker issue in ADL-N.
Please refer the Doc with ID 742988 for more details.
BUG=b:248249033, b:245970842
TEST=Verified that the display flicker issue is fixed.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: If9f40e6c37e80caceb726a8e5f4d4b14dc479858
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67654
Reviewed-by: Vidya Gopalakrishnan <vidya.gopalakrishnan@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_n.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb index ae9e11ec9b..b54a134530 100644 --- a/src/mainboard/intel/adlrvp/devicetree_n.cb +++ b/src/mainboard/intel/adlrvp/devicetree_n.cb @@ -138,7 +138,7 @@ chip soc/intel/alderlake # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, |