diff options
author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-05-24 10:03:24 +0800 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2022-07-01 07:24:07 +0000 |
commit | 8481056a53f5a42bfece355595c6dad21f2fd8f4 (patch) | |
tree | f148a19a87709fcbef6e39f293df1a3de0a1d330 /src | |
parent | 366fba27a8416c7303510540d926d11afb9c1459 (diff) |
mb/google/rex: Add EC smihandler
Add SMI handler implementation to manage power cycle,
power state transition and Chrome EC events.
BUG=b:224325352
TEST=util/abuild/abuild -p none -t google/rex -a -c max
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I10aab8257fce92aaf913a53c0c9fb6c1a4f5dea6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64623
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/rex/Makefile.inc | 2 | ||||
-rw-r--r-- | src/mainboard/google/rex/smihandler.c | 29 |
2 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/Makefile.inc b/src/mainboard/google/rex/Makefile.inc index 051169535e..fc26bd2731 100644 --- a/src/mainboard/google/rex/Makefile.inc +++ b/src/mainboard/google/rex/Makefile.inc @@ -9,6 +9,8 @@ ramstage-y += mainboard.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += ec.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c + VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR)) diff --git a/src/mainboard/google/rex/smihandler.c b/src/mainboard/google/rex/smihandler.c new file mode 100644 index 0000000000..9208d51613 --- /dev/null +++ b/src/mainboard/google/rex/smihandler.c @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <cpu/x86/smm.h> +#include <ec/google/chromeec/ec.h> +#include <ec/google/chromeec/smm.h> +#include <elog.h> +#include <intelblocks/smihandler.h> +#include <variant/ec.h> + +void mainboard_smi_sleep(u8 slp_typ) +{ + chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS); +} + +int mainboard_smi_apmc(u8 apmc) +{ + chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); + return 0; +} + +void elog_gsmi_cb_mainboard_log_wake_source(void) +{ + google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | MAINBOARD_EC_S0IX_WAKE_EVENTS); +} + +void mainboard_smi_espi_handler(void) +{ + chromeec_smi_process_events(); +} |