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authorFlorian Zumbiehl <florz@florz.de>2011-11-01 20:19:02 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2011-11-07 18:37:02 +0100
commit7b1d295f62be4c4d59ea8d1ac18e8ef0bedbca6e (patch)
tree760da52d3357c87126d6920fbdacebd79e3bec76 /src
parent522e9e9746f4d98c5e8a9b83058ca143e9347d0a (diff)
add support for 1106:3188 (host controller of the old version of k8t800)
Change-Id: Id61678f03e1f7d964f7180a062dd6a689852d4ac Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/401 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/via/k8t890/host.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/src/southbridge/via/k8t890/host.c b/src/southbridge/via/k8t890/host.c
index 13bd69330f..700a6372fa 100644
--- a/src/southbridge/via/k8t890/host.c
+++ b/src/southbridge/via/k8t890/host.c
@@ -25,6 +25,36 @@
#include <console/console.h>
#include "k8x8xx.h"
+static void host_old_enable(struct device *dev)
+{
+ int agp3;
+
+ /* some HT tweaking */
+ pci_write_config8(dev, 0x50, 0x03);
+ pci_write_config8(dev, 0x55, 0x2c);
+
+ /* AGP setup */
+ pci_write_config8(dev, 0xac, 0x06);
+ pci_write_config8(dev, 0xad, 0x08);
+ pci_write_config8(dev, 0xfd, 0x02);
+ pci_write_config8(dev, 0x85, 0xb0);
+ pci_write_config8(dev, 0x87, 0x07);
+ pci_write_config8(dev, 0xfd, 0x06); // this is required for the following write to work
+ pci_write_config8(dev, 0xaf, 0x88);
+ pci_write_config8(dev, 0xfd, 0x04); // select AGP 3.0
+ agp3 = pci_read_config8(dev, 0x84) & 0x08;
+ pci_write_config8(dev, 0xb1, agp3 ? 0x00 : 0x9B);
+ pci_write_config8(dev, 0xb3, agp3 ? 0x00 : 0x9B);
+ pci_write_config8(dev, 0xb0, 0x40);
+ pci_write_config8(dev, 0xb2, 0x11);
+ pci_write_config8(dev, 0xed, 0x40);
+}
+
+static void host_old_init(struct device *dev)
+{
+ k8x8xx_vt8237r_cfg(dev, NULL);
+}
+
static void host_enable(struct device *dev)
{
/* Multiple function control */
@@ -56,6 +86,15 @@ static void host_init(struct device *dev)
}
+static const struct device_operations host_ops_old = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .enable = host_old_enable,
+ .init = host_old_init,
+ .ops_pci = 0,
+};
+
static const struct device_operations host_ops_t = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
@@ -73,6 +112,12 @@ static const struct device_operations host_ops_m = {
.ops_pci = 0,
};
+static const struct pci_driver northbridge_driver_t800_old __pci_driver = {
+ .ops = &host_ops_old,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T800_AGP,
+};
+
static const struct pci_driver northbridge_driver_t800 __pci_driver = {
.ops = &host_ops_t,
.vendor = PCI_VENDOR_ID_VIA,