diff options
| author | Subrata Banik <subratabanik@google.com> | 2023-08-03 10:26:21 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-11 13:19:48 +0000 |
| commit | 71a2a3d8fcf07465506a9f48790d424cf3b4bf39 (patch) | |
| tree | 5c6b18666024e1d92f99bf8d07a8d48193ffc83e /src | |
| parent | 7bc92f03a669f4721bd690f56703a6976c0ae3b9 (diff) | |
soc/intel/meteorlake: Add provision to show pre-boot splash screen
This patch adds the ability to show a pre-boot splash screen on
Meteor Lake systems using FSP-S.
The patch calls into `fsp_convert_bmp_to_gop_blt()` when the
`BMP_LOGO` config is enabled. This function converts a BMP
file to a BLT buffer, which is then used by FSP-S to render the splash
screen.
Additionally, increase the heap size (malloc'able size) upto 512KB
(when BMP_LOGO config is enabled) to accommodate high
resolution logo file.
BUG=b:284799726
TEST=Able to see pre-boot splash screen while booting google/rex.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3608bfacc21574e12cde0e2012a16e6388ce54df
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76922
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/meteorlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 8 |
2 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 8f4e3a2405..6391ed8d8d 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -187,6 +187,7 @@ config IED_REGION_SIZE config HEAP_SIZE hex + default 0x80000 if BMP_LOGO default 0x10000 # Intel recommends reserving the PCIe TBT root port resources as below: diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 7a2a9d8b48..7a7a2e60c2 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -10,6 +10,7 @@ #include <device/pci.h> #include <fsp/api.h> #include <fsp/fsp_debug_event.h> +#include <fsp/fsp_gop_blt.h> #include <fsp/ppi/mp_service_ppi.h> #include <fsp/util.h> #include <option.h> @@ -868,5 +869,10 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *s_cfg) /* Handle FSP logo params */ void soc_load_logo(FSPS_UPD *supd) { - bmp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize); + fsp_convert_bmp_to_gop_blt(&supd->FspsConfig.LogoPtr, + &supd->FspsConfig.LogoSize, + &supd->FspsConfig.BltBufferAddress, + &supd->FspsConfig.BltBufferSize, + &supd->FspsConfig.LogoPixelHeight, + &supd->FspsConfig.LogoPixelWidth); } |