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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-22 22:07:43 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-25 20:18:40 +0000
commit2d4986c1683ca4a77a93a5ba63e481f7c5862693 (patch)
treef3e800c7aef6d64e2ffb109b96feea5ccaf714e4 /src
parentac1bba8e34ea7b2c9112b19c4d7e63e74949a899 (diff)
cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs
All x86-based CPUs and SoCs in the coreboot tree end up including the Makefile in cpu/x86/mtrr, so include this directly in the Makefile in cpu/x86 to add it for all x86 CPUs/SoCs. In the unlikely case that a new x86 CPU/SoC will be added, a CPU_X86_MTRR Kconfig option that is selected be default could be added and the new CPU/SoC without MTRR support can override this option that then will be used in the Makefile to guard adding the Makefile from the cpu/x86/mtrr sub-directory. In cpu/intel all models except model 2065X and 206AX are selcted by a socket and rely on the socket's Makefile.inc to add x86/mtrr to the subdirs, so those models don't add x86/mtrr themselves. The Intel Broadwell SoC selects CPU_INTEL_HASWELL and which added x86/mtrr to the subdirs. The Intel Xeon SP SoC directory contains two sub-folders for different versions or generations which both add x86/mtrr to the subdirs in their Makefiles. Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/amd/agesa/family14/Makefile.inc1
-rw-r--r--src/cpu/amd/agesa/family15tn/Makefile.inc1
-rw-r--r--src/cpu/amd/agesa/family16kb/Makefile.inc1
-rw-r--r--src/cpu/amd/pi/00730F01/Makefile.inc1
-rw-r--r--src/cpu/intel/haswell/Makefile.inc1
-rw-r--r--src/cpu/intel/model_2065x/Makefile.inc1
-rw-r--r--src/cpu/intel/model_206ax/Makefile.inc1
-rw-r--r--src/cpu/intel/slot_1/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_441/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_BGA956/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_FCBGA559/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_LGA775/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_m/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_mPGA604/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_p/Makefile.inc1
-rw-r--r--src/cpu/qemu-x86/Makefile.inc1
-rw-r--r--src/cpu/x86/Makefile.inc1
-rw-r--r--src/soc/amd/cezanne/Makefile.inc1
-rw-r--r--src/soc/amd/picasso/Makefile.inc1
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc1
-rw-r--r--src/soc/example/min86/Makefile.inc2
-rw-r--r--src/soc/intel/alderlake/Makefile.inc1
-rw-r--r--src/soc/intel/apollolake/Makefile.inc1
-rw-r--r--src/soc/intel/baytrail/Makefile.inc1
-rw-r--r--src/soc/intel/braswell/Makefile.inc1
-rw-r--r--src/soc/intel/cannonlake/Makefile.inc1
-rw-r--r--src/soc/intel/denverton_ns/Makefile.inc1
-rw-r--r--src/soc/intel/elkhartlake/Makefile.inc1
-rw-r--r--src/soc/intel/icelake/Makefile.inc1
-rw-r--r--src/soc/intel/jasperlake/Makefile.inc1
-rw-r--r--src/soc/intel/quark/Makefile.inc1
-rw-r--r--src/soc/intel/skylake/Makefile.inc1
-rw-r--r--src/soc/intel/tigerlake/Makefile.inc1
-rw-r--r--src/soc/intel/xeon_sp/cpx/Makefile.inc1
-rw-r--r--src/soc/intel/xeon_sp/skx/Makefile.inc1
35 files changed, 1 insertions, 35 deletions
diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc
index c9074d87ac..14971009d9 100644
--- a/src/cpu/amd/agesa/family14/Makefile.inc
+++ b/src/cpu/amd/agesa/family14/Makefile.inc
@@ -9,5 +9,4 @@ ramstage-y += model_14_init.c
subdirs-y += ../../mtrr
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc
index 42e1c2c7b2..af06dd17a0 100644
--- a/src/cpu/amd/agesa/family15tn/Makefile.inc
+++ b/src/cpu/amd/agesa/family15tn/Makefile.inc
@@ -12,5 +12,4 @@ subdirs-y += ../../mtrr
subdirs-y += ../../smm
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc
index 05e61ea36d..f466bbcff7 100644
--- a/src/cpu/amd/agesa/family16kb/Makefile.inc
+++ b/src/cpu/amd/agesa/family16kb/Makefile.inc
@@ -9,5 +9,4 @@ ramstage-y += model_16_init.c
subdirs-y += ../../mtrr
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc
index 446be5d14f..9f410824a4 100644
--- a/src/cpu/amd/pi/00730F01/Makefile.inc
+++ b/src/cpu/amd/pi/00730F01/Makefile.inc
@@ -10,5 +10,4 @@ ramstage-y += update_microcode.c
subdirs-y += ../../mtrr
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index ebdcc91b96..a46effe874 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -15,7 +15,6 @@ bootblock-y += bootblock.c
postcar-y += ../car/non-evict/exit_car.S
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc
index 85602deca4..544755a1cb 100644
--- a/src/cpu/intel/model_2065x/Makefile.inc
+++ b/src/cpu/intel/model_2065x/Makefile.inc
@@ -1,7 +1,6 @@
ramstage-y += model_2065x_init.c
subdirs-y += ../../x86/name
subdirs-y += ../../x86/cache
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../intel/turbo
subdirs-y += ../../intel/microcode
diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc
index 2b28eb4fbc..1217f3383c 100644
--- a/src/cpu/intel/model_206ax/Makefile.inc
+++ b/src/cpu/intel/model_206ax/Makefile.inc
@@ -2,7 +2,6 @@ ramstage-y += model_206ax_init.c
subdirs-y += ../../x86/name
subdirs-y += ../smm/gen1
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc
index df7a0bd4f8..28df10ea23 100644
--- a/src/cpu/intel/slot_1/Makefile.inc
+++ b/src/cpu/intel/slot_1/Makefile.inc
@@ -7,7 +7,6 @@ subdirs-y += ../model_65x
subdirs-y += ../model_67x
subdirs-y += ../model_68x
subdirs-y += ../model_6bx
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc
index 47fa296f0e..dfed16c717 100644
--- a/src/cpu/intel/socket_441/Makefile.inc
+++ b/src/cpu/intel/socket_441/Makefile.inc
@@ -1,5 +1,4 @@
subdirs-y += ../model_106cx
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc
index bdf90a97bd..a39798449b 100644
--- a/src/cpu/intel/socket_BGA956/Makefile.inc
+++ b/src/cpu/intel/socket_BGA956/Makefile.inc
@@ -1,5 +1,4 @@
subdirs-y += ../model_1067x
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc
index 3a0db36907..64d0c36507 100644
--- a/src/cpu/intel/socket_FCBGA559/Makefile.inc
+++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc
@@ -1,5 +1,4 @@
subdirs-y += ../model_106cx
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc
index f684bfbd10..a16f670fca 100644
--- a/src/cpu/intel/socket_LGA775/Makefile.inc
+++ b/src/cpu/intel/socket_LGA775/Makefile.inc
@@ -4,7 +4,6 @@ subdirs-y += ../model_f4x
#subdirs-y += ../model_f6x
#subdirs-y += ../model_1066x
subdirs-y += ../model_1067x
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc
index 21923286db..2bcd580abc 100644
--- a/src/cpu/intel/socket_m/Makefile.inc
+++ b/src/cpu/intel/socket_m/Makefile.inc
@@ -1,6 +1,5 @@
subdirs-y += ../model_6ex
subdirs-y += ../model_6fx
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc
index 345e4e0746..2bca94ea2d 100644
--- a/src/cpu/intel/socket_mPGA604/Makefile.inc
+++ b/src/cpu/intel/socket_mPGA604/Makefile.inc
@@ -1,5 +1,4 @@
subdirs-y += ../model_f2x
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc
index 2565493a47..8588c37135 100644
--- a/src/cpu/intel/socket_p/Makefile.inc
+++ b/src/cpu/intel/socket_p/Makefile.inc
@@ -1,6 +1,5 @@
subdirs-y += ../model_6fx
subdirs-y += ../model_1067x
-subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc
index 1b1b60343e..42e18060b2 100644
--- a/src/cpu/qemu-x86/Makefile.inc
+++ b/src/cpu/qemu-x86/Makefile.inc
@@ -7,5 +7,4 @@ romstage-y += ../intel/car/romstage.c
ramstage-y += qemu.c
-subdirs-y += ../x86/mtrr
subdirs-y += ../x86/lapic
diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc
index 1ad04b5316..016b601411 100644
--- a/src/cpu/x86/Makefile.inc
+++ b/src/cpu/x86/Makefile.inc
@@ -1,3 +1,4 @@
+subdirs-y += mtrr
subdirs-y += pae
subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm
subdirs-$(CONFIG_UDELAY_TSC) += tsc
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 918aa81447..5e6b257029 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -3,7 +3,6 @@
ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index d873079b2c..e95a173565 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -4,7 +4,6 @@ ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/cache
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/pae
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index fb6e20488b..46e5b9d383 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
subdirs-y += ../../../cpu/amd/mtrr/
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/cache
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/pae
bootblock-y += uart.c
diff --git a/src/soc/example/min86/Makefile.inc b/src/soc/example/min86/Makefile.inc
index 9c1c7f0331..c3cc195af4 100644
--- a/src/soc/example/min86/Makefile.inc
+++ b/src/soc/example/min86/Makefile.inc
@@ -10,6 +10,4 @@ romstage-y += romstage.c
ramstage-y += chip.c
ramstage-y += timer.c
-subdirs-y += ../../../cpu/x86/mtrr
-
endif
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index 728c58c967..bd554b995a 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -3,7 +3,6 @@ subdirs-y += romstage
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage)
all-y += gspi.c
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 49707da1a6..6ef79fcdc3 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/common
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/cache
bootblock-y += bootblock/bootblock.c
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index 5500da9e44..33aaba0d8f 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
subdirs-y += romstage
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/intel/common
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index 0080d72c24..07bd26fe26 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
subdirs-y += romstage
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/intel/common
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 49e9f0c707..bc15e1f025 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -4,7 +4,6 @@ subdirs-y += romstage
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/intel/common
bootblock-y += bootblock/bootblock.c
diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc
index c222920d73..d49be2410f 100644
--- a/src/soc/intel/denverton_ns/Makefile.inc
+++ b/src/soc/intel/denverton_ns/Makefile.inc
@@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y)
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/cache
bootblock-y += bootblock/bootblock.c
diff --git a/src/soc/intel/elkhartlake/Makefile.inc b/src/soc/intel/elkhartlake/Makefile.inc
index e3cf119ba5..c32ba1f245 100644
--- a/src/soc/intel/elkhartlake/Makefile.inc
+++ b/src/soc/intel/elkhartlake/Makefile.inc
@@ -4,7 +4,6 @@ subdirs-y += romstage
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage)
all-y += gspi.c
diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc
index a53a225b12..847418de1c 100644
--- a/src/soc/intel/icelake/Makefile.inc
+++ b/src/soc/intel/icelake/Makefile.inc
@@ -4,7 +4,6 @@ subdirs-y += romstage
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage)
all-y += gspi.c
diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc
index f450257b54..276f3c0cd5 100644
--- a/src/soc/intel/jasperlake/Makefile.inc
+++ b/src/soc/intel/jasperlake/Makefile.inc
@@ -4,7 +4,6 @@ subdirs-y += romstage
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage)
all-y += gspi.c
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc
index c0b213eb60..8b0c8bf88b 100644
--- a/src/soc/intel/quark/Makefile.inc
+++ b/src/soc/intel/quark/Makefile.inc
@@ -3,7 +3,6 @@
ifeq ($(CONFIG_SOC_INTEL_QUARK),y)
subdirs-y += romstage
-subdirs-y += ../../../cpu/x86/mtrr
bootblock-y += bootblock/esram_init.S
bootblock-y += bootblock/bootblock.c
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index c191aac607..775bec1ce6 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -6,7 +6,6 @@ subdirs-y += ../../../cpu/intel/common
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
bootblock-y += bootblock/bootblock.c
bootblock-y += i2c.c
diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc
index bce36538ee..9e5a3c8231 100644
--- a/src/soc/intel/tigerlake/Makefile.inc
+++ b/src/soc/intel/tigerlake/Makefile.inc
@@ -4,7 +4,6 @@ subdirs-y += romstage
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage)
all-y += gspi.c
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc
index 2df370ae2b..ef38ce8acc 100644
--- a/src/soc/intel/xeon_sp/cpx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc
@@ -4,7 +4,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y)
subdirs-y += ../../../../cpu/intel/turbo
subdirs-y += ../../../../cpu/x86/lapic
-subdirs-y += ../../../../cpu/x86/mtrr
subdirs-y += ../../../../cpu/intel/microcode
romstage-y += romstage.c ddr.c
diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc
index 5840580334..eafd800229 100644
--- a/src/soc/intel/xeon_sp/skx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/skx/Makefile.inc
@@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_INTEL_SKYLAKE_SP),y)
subdirs-y += ../../../../cpu/intel/microcode
subdirs-y += ../../../../cpu/intel/turbo
subdirs-y += ../../../../cpu/x86/lapic
-subdirs-y += ../../../../cpu/x86/mtrr
subdirs-y += ../../../../cpu/x86/cache
postcar-y += soc_util.c