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authorFelix Held <felix-coreboot@felixheld.de>2021-07-09 23:02:51 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-07-12 13:33:03 +0000
commit2828fee7e064e09b7ddd7273540a13f4fbd96beb (patch)
treef9f5279f87f6001c83d89bc3199410cad79dfc60 /src
parent3f1b70640a409458053775f8d56602dda1312f50 (diff)
cpu/amd/*/model_*_init: use mca_get_bank_count()
Use the common mca_get_bank_count function instead of open-coding the functionality to get the MCA bank number. Also re-type the num_banks variable from signed in to unsigned int, since the number of MCA bank is always positive. Change-Id: I70ad423aab484cf4ec8f51b43624cd434647aad4 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56184 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c5
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c5
-rw-r--r--src/cpu/amd/agesa/family16kb/model_16_init.c5
-rw-r--r--src/cpu/amd/pi/00730F01/model_16_init.c5
4 files changed, 8 insertions, 12 deletions
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 942539cac2..1bcbc34904 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -17,7 +17,7 @@ static void model_14_init(struct device *dev)
{
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
int msrno;
#if CONFIG(LOGICAL_CPUS)
u32 siblings;
@@ -59,8 +59,7 @@ static void model_14_init(struct device *dev)
x86_enable_cache();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 83efb44693..c7fcb36c20 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -20,7 +20,7 @@ static void model_15_init(struct device *dev)
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
int msrno;
unsigned int cpu_idx;
#if CONFIG(LOGICAL_CPUS)
@@ -58,8 +58,7 @@ static void model_15_init(struct device *dev)
x86_enable_cache();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index c1c75775e0..28c3e78900 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -19,7 +19,7 @@ static void model_16_init(struct device *dev)
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
int msrno;
#if CONFIG(LOGICAL_CPUS)
u32 siblings;
@@ -56,8 +56,7 @@ static void model_16_init(struct device *dev)
x86_enable_cache();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c
index 358f83b775..7266a2cc61 100644
--- a/src/cpu/amd/pi/00730F01/model_16_init.c
+++ b/src/cpu/amd/pi/00730F01/model_16_init.c
@@ -22,7 +22,7 @@ static void model_16_init(struct device *dev)
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
u32 siblings;
/*
@@ -41,8 +41,7 @@ static void model_16_init(struct device *dev)
x86_mtrr_check();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)