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authorArthur Heymans <arthur@aheymans.xyz>2022-05-11 22:00:59 +0200
committerArthur Heymans <arthur@aheymans.xyz>2022-05-13 10:57:03 +0000
commit0cc56a2848e9558bcc63c5b68924ad46f4339804 (patch)
tree6d511ec58e72f898aaa5343047706f3c7ee11ddb /src
parent022d235a1e2f118814fc0f21ef6689c6eb958dbe (diff)
nb/intel/gm45/dsdt: Fix number of PCI busses
Linux complained that the numbers in DSDT (256) don't match with the values in MMCONF (64). Change-Id: I2ccac64934e8d284e68945f86ec46cb2bf896277 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64260 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/gm45/acpi/hostbridge.asl10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl
index ff86b3fca8..7c8600341a 100644
--- a/src/northbridge/intel/gm45/acpi/hostbridge.asl
+++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl
@@ -83,9 +83,10 @@ Device (MCHC)
Name (MCRS, ResourceTemplate()
{
- /* Bus Numbers */
+ /* Bus Numbers. Highest bus gets updated later */
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
- 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,, PB00)
+ 0x0000, 0x0000, 0x0000, 0x0000,
+ CONFIG_ECAM_MMCONF_BUS_NUMBER,,, PB00)
/* IO Region 0 */
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
@@ -207,6 +208,11 @@ External (A4GB, IntObj)
/* Current Resource Settings */
Method (_CRS, 0, Serialized)
{
+ /* Set highest PCI bus */
+ CreateWordField(MCRS, ^PB00._MAX, BMAX)
+ CreateWordField(MCRS, ^PB00._LEN, BLEN)
+ BMAX = BLEN - 1
+
/* Find PCI resource area in MCRS */
CreateDwordField(MCRS, ^PM01._MIN, PMIN)
CreateDwordField(MCRS, ^PM01._MAX, PMAX)