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authorLee Leahy <leroy.p.leahy@intel.com>2016-02-08 08:37:53 -0800
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-02-08 18:53:45 +0100
commitcff5f09e9340229cade13960f1c08ede7ec5596f (patch)
treebe23bf81db5b91cb124e4dfa6863bb093654c21e /src
parent35852b9037d0bffc350b3c64747b06b6eadec488 (diff)
drivers/intel/fsp1_1: Make fsp_run_silicon_init public
Remove the "static" declaration from fsp_run_silicon_init and declare the routine in ramstage.h. This routine can be called directly when FSP is already in RAM. TEST=Build and run on Galileo Change-Id: Iddb32d00c5d4447eab5c95b0ad5c40309afa293e Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13630 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/intel/fsp1_1/include/fsp/ramstage.h1
-rw-r--r--src/drivers/intel/fsp1_1/ramstage.c8
2 files changed, 4 insertions, 5 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
index 9729a5a629..5ce6aa8892 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
@@ -23,6 +23,7 @@
/* Perform Intel silicon init. */
void intel_silicon_init(void);
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup);
/* Called after the silicon init code has run. */
void soc_after_silicon_init(void);
/* Initialize UPD data before SiliconInit call. */
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 20ec323308..277b60990c 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -89,9 +89,8 @@ static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
"ERROR - Missing one or more required FSP HOBs!\n");
}
-static void fsp_run_silicon_init(int is_s3_wakeup)
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
{
- FSP_INFO_HEADER *fsp_info_header;
FSP_SILICON_INIT fsp_silicon_init;
SILICON_INIT_UPD *original_params;
SILICON_INIT_UPD silicon_init_params;
@@ -99,8 +98,7 @@ static void fsp_run_silicon_init(int is_s3_wakeup)
UPD_DATA_REGION *upd_ptr;
VPD_DATA_REGION *vpd_ptr;
- /* Find the FSP image */
- fsp_info_header = fsp_get_fih();
+ /* Display the FSP header */
if (fsp_info_header == NULL) {
printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n");
return;
@@ -191,7 +189,7 @@ void intel_silicon_init(void)
/* FSP_INFO_HEADER is set as the program entry. */
fsp_update_fih(prog_entry(&fsp));
- fsp_run_silicon_init(is_s3_wakeup);
+ fsp_run_silicon_init(fsp_get_fih(), is_s3_wakeup);
}
/* Initialize the UPD parameters for SiliconInit */