diff options
author | Mike Banon <mikebdp2@gmail.com> | 2018-08-23 00:50:08 +0300 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-05-20 15:15:22 +0000 |
commit | 334e8360efb03644488ce4ac8a9a9e75ef6fa6c0 (patch) | |
tree | 375720660e6bab2f3480e8e495facbd5857454a6 /src/vendorcode | |
parent | cf041d8c8375d07434908a8bd1028d4bd0d54070 (diff) |
src/vendorcode/amd/agesa/f15tn: Update microcode to version 0x600111F 2018-03-05
This microcode update for CPU IDs 0x610F01/0x610F31 improves system stability:
in particular, fixes Xen hardware virtualization freezes. Also it attempts to
patch some Spectre-related security vulnerabilities. This new microcode has been
tested by multiple coreboot community members and found working perfectly.
Old version: 0x600110F [2012-01-11]
replaced by
New version: 0x600111F [2018-03-05]
Change-Id: Ied5da0ff85abb63c2db2eeafd051b8e00916d961
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/28273
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: <awokd@danwin1210.me>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode')
4 files changed, 408 insertions, 2676 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h b/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h index f0d9194018..bd00756c43 100644 --- a/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h +++ b/src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h @@ -808,9 +808,9 @@ extern F_IS_NB_PSTATE_ENABLED F15IsNbPstateEnabled; #define F15_TN_UCODE_0E #if AGESA_ENTRY_INIT_EARLY == TRUE - extern CONST UINT8 ROMDATA CpuF15TnMicrocodePatch0600110F_Enc []; + extern CONST UINT8 ROMDATA CpuF15TnMicrocodePatch0600111F_Enc []; #undef F15_TN_UCODE_10F - #define F15_TN_UCODE_10F CpuF15TnMicrocodePatch0600110F_Enc, + #define F15_TN_UCODE_10F CpuF15TnMicrocodePatch0600111F_Enc, #endif diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c deleted file mode 100644 index 80e60f6313..0000000000 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c +++ /dev/null @@ -1,2673 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD F15Tn Microcode patch. - * - * F15Tn Microcode Patch rev 0600110F for 6101 or equivalent. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: CPU/Family/0x15/TN - * @e \$Revision: 64060 $ @e \$Date: 2012-01-15 21:36:26 -0600 (Sun, 15 Jan 2012) $ - */ -/***************************************************************************** - * - * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - - - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "Ids.h" -#include "cpuRegisters.h" -#include "cpuEarlyInit.h" -CODE_GROUP (G3_DXE) -RDATA_GROUP (G3_DXE) - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -// Encrypt Patch code 0600110F for 6101 and equivalent - -CONST UINT8 ROMDATA CpuF15TnMicrocodePatch0600110F_Enc [IDS_PAD_4K] = -{ - 0x12, - 0x20, - 0x11, - 0x01, - 0x0f, - 0x11, - 0x00, - 0x06, - 0x02, - 0x80, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x01, - 0x61, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0xd4, - 0x3d, - 0x97, - 0xf0, - 0xd2, - 0x1a, - 0xcf, - 0x44, - 0x1d, - 0x45, - 0x82, - 0x13, - 0xec, - 0xcd, - 0x52, - 0x24, - 0x2d, - 0x26, - 0x73, - 0x9f, - 0x0e, - 0x38, - 0x80, - 0x5b, - 0x02, - 0x6a, - 0xd3, - 0x80, - 0x97, - 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0x4c, - 0x84, - 0x81, - 0x21, - 0xb0, - 0x6b, - 0x25, - 0xa8, - 0x3e, - 0xc6, - 0xa4, - 0xc2, - 0x0a, - 0x46, - 0x52, - 0x4f, - 0x72, - 0x56, - 0x06, - 0xec, - 0x76, - 0xda, - 0x7e, - 0x09, - 0x45, - 0x05, - 0x9b, - 0xdb, - 0x31, - 0x90, - 0x63, - 0xdf, - 0x98, - 0x47, - 0x4a, - 0x9e, - 0x28, - 0x3d, - 0x0d, - 0x64, - 0xfb, - 0x44, - 0xc5, - 0xfb, - 0xe2, - 0x56, - 0xe9, - 0x08, - 0x98, - 0x79, - 0x2f, - 0xaf, - 0x15, - 0xb5, - 0xea, - 0x7e, - 0x61, - 0x89, - 0x16, - 0x5e, - 0x9c, - 0x6e, - 0xca, - 0x90, - 0x90, - 0x4a, - 0x5f, - 0x14, - 0x83, - 0x67, - 0x47, - 0x44, - 0xae, - 0x0a, - 0x83, - 0xc4, - 0x95, - 0xf6, - 0x88, - 0xc2, - 0xfb, - 0xa3, - 0x9b, - 0x7a, - 0xf9, - 0x32, - 0x80, - 0x94, - 0xf4, - 0x16, - 0x5a, - 0xd4, - 0xef, - 0x39, - 0xe8, - 0x86, - 0xe1, - 0xcd, - 0x6a, - 0x7e, - 0xca, - 0x33, - 0xa1, - 0xd4, - 0xcb, - 0xe9, - 0x5a, - 0xca, - 0xc6, - 0xb0, - 0xd9, - 0x68, - 0x27, - 0x8c, - 0x93, - 0x47, - 0x3e, - 0x4f, - 0xc0, - 0xa8, - 0x86, - 0x68, - 0x4b, - 0x1a, - 0xf5, - 0x93, - 0xdd, - 0x16, - 0xed, - 0x8e, - 0x27, - 0x66, - 0x4d, - 0x59, - 0xf0, - 0x27, - 0x1b, - 0x37, - 0xa0, - 0x25, - 0x9a, - 0x62, - 0xb4, - 0x6f, - 0xbd, - 0x83, - 0x28, - 0x0b, - 0x26, - 0xa9, - 0x07, - 0xac, - 0xb5, - 0x91, - 0x93, - 0x91, -}; - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c new file mode 100644 index 0000000000..71fb1df0a8 --- /dev/null +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c @@ -0,0 +1,405 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * AMD F15Tn Microcode patch. + * + * F15Tn Microcode Patch rev 0600111F for 6101/6131 or equivalent. + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: CPU/Family/0x15/TN + * @e \$Revision: 334098 $ @e \$Date: 2018-03-05 14:21:15 -0600 (Mon, 05 Mar 2018) $ + */ +/***************************************************************************** + * + * Copyright (c) 2008 - 2018, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + + + +/*---------------------------------------------------------------------------------------- + * M O D U L E S U S E D + *---------------------------------------------------------------------------------------- + */ +#include "AGESA.h" +#include "Ids.h" +#include "cpuRegisters.h" +#include "cpuEarlyInit.h" +CODE_GROUP (G3_DXE) +RDATA_GROUP (G3_DXE) + +/*---------------------------------------------------------------------------------------- + * D E F I N I T I O N S A N D M A C R O S + *---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * T Y P E D E F S A N D S T R U C T U R E S + *---------------------------------------------------------------------------------------- + */ + + +// Encrypt Patch code 0600111F for 6101/6131 and equivalent + +CONST UINT8 ROMDATA CpuF15TnMicrocodePatch0600111F_Enc [IDS_PAD_4K] = +{ + 0x18, 0x20, 0x05, 0x03, 0x1f, 0x11, 0x00, 0x06, + 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xd0, 0xb7, 0x58, 0x1c, 0xca, 0xa2, 0xf2, 0x52, + 0x72, 0xa4, 0xe1, 0x1b, 0x37, 0xe0, 0x9f, 0xb3, + 0x58, 0xf4, 0x76, 0x85, 0x1a, 0x83, 0x4a, 0x89, + 0x78, 0x82, 0x4e, 0xf3, 0xa1, 0x6a, 0xb7, 0x56, + 0x93, 0xcb, 0xfa, 0x4c, 0x03, 0x6b, 0xec, 0xb5, + 0x4f, 0xc0, 0x7d, 0x46, 0x0e, 0x04, 0x96, 0xec, + 0xab, 0xc3, 0x74, 0x0c, 0x4b, 0x1c, 0x19, 0x1f, + 0x62, 0x89, 0x66, 0xe4, 0x63, 0x1f, 0x9f, 0x0b, + 0xd6, 0x35, 0x08, 0xd3, 0xa3, 0xee, 0xbd, 0xf6, + 0x6d, 0x98, 0x95, 0x28, 0x75, 0x18, 0xce, 0x98, + 0x6e, 0xf6, 0x5c, 0x71, 0xf5, 0xf0, 0xeb, 0x06, + 0x59, 0xf1, 0x40, 0x8e, 0x84, 0xfe, 0xf0, 0x49, + 0x23, 0x4b, 0xb4, 0x6f, 0x38, 0xa4, 0xd8, 0x09, + 0x9e, 0xbe, 0x63, 0x9b, 0x20, 0xf3, 0xf7, 0xc7, + 0x2c, 0x71, 0xfe, 0x6a, 0xd3, 0x98, 0xe0, 0x74, + 0xea, 0x8e, 0xd8, 0x3c, 0x42, 0x7b, 0x03, 0x2d, + 0x02, 0x28, 0xb0, 0x99, 0x0f, 0x16, 0x54, 0x31, + 0x08, 0x27, 0x27, 0xb7, 0x7c, 0x31, 0x95, 0x1b, + 0x20, 0xfc, 0x47, 0x3b, 0xc6, 0x20, 0x8e, 0xd0, + 0xe7, 0x97, 0x43, 0xb6, 0x83, 0x74, 0x12, 0x01, + 0x43, 0x70, 0xc5, 0x71, 0x37, 0xf9, 0x13, 0xa2, + 0x7c, 0x4f, 0x7c, 0xf1, 0x8f, 0xec, 0x8a, 0xeb, + 0xb6, 0x04, 0x33, 0x99, 0xdc, 0xa5, 0x32, 0x9e, + 0x5c, 0xad, 0x7b, 0xbe, 0x1b, 0x8d, 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*---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * E X P O R T E D F U N C T I O N S + *---------------------------------------------------------------------------------------- + */ diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc index 7d52cb6dae..e4b04247b2 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc @@ -4,7 +4,7 @@ libagesa-y += F15TnEquivalenceTable.c libagesa-y += F15TnInitEarlyTable.c libagesa-y += F15TnIoCstate.c libagesa-y += F15TnLogicalIdTables.c -libagesa-y += F15TnMicrocodePatch0600110F_Enc.c +libagesa-y += F15TnMicrocodePatch0600111F_Enc.c libagesa-y += F15TnMicrocodePatchTables.c libagesa-y += F15TnMsrTables.c libagesa-y += F15TnPciTables.c |