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authorElyes Haouas <ehaouas@noos.fr>2024-06-01 18:12:16 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-07-10 12:55:46 +0000
commite7fa24470dc3b3403eabd757a87cfb993f316b1a (patch)
tree6497bd70076905089fc81ed777cbec34486569c0 /src/vendorcode/amd
parenta9997f891facaf3c855d7f2c9c6840acbf101193 (diff)
cbmem_top: Change the return value to uintptr_t
Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82752 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd')
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/memmap.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/amd/opensil/genoa_poc/memmap.c b/src/vendorcode/amd/opensil/genoa_poc/memmap.c
index bdf58e989e..6261ad0260 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/memmap.c
+++ b/src/vendorcode/amd/opensil/genoa_poc/memmap.c
@@ -87,7 +87,7 @@ BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_ENTRY, print_memory_holes, NULL);
void add_opensil_memmap(struct device *dev, unsigned long *idx)
{
// Account for UMA and TSEG
- const uint32_t mem_usable = (uintptr_t)cbmem_top();
+ const uint32_t mem_usable = cbmem_top();
const uint32_t top_mem = ALIGN_DOWN(get_top_of_mem_below_4gb(), 1 * MiB);
if (mem_usable != top_mem)
reserved_ram_from_to(dev, (*idx)++, mem_usable, top_mem);