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| author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2021-05-24 00:13:59 -0700 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-05-26 14:09:08 +0000 |
| commit | ef41e8a44c4c6e69ecfcb257fcbc585e8f02a64e (patch) | |
| tree | 53300e4219eb8db9505d67e7ca03bd2e53ba82e8 /src/vendorcode/amd/cimx/sb900/Azalia.c | |
| parent | 29ad904cbeb52a6d0d8e546531b03a6b6a4d07d7 (diff) | |
vendorcode/intel/fsp: Add Elkhart Lake FSP headers for FSP v3162
The FSP-M/S/T related headers added are generated as per FSP v3162.
Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: Ie6e6db704bcf86034fc9a3423101f0391ba2327e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54869
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/cimx/sb900/Azalia.c')
0 files changed, 0 insertions, 0 deletions