diff options
author | WANG Siyuan <wangsiyuanbuaa@gmail.com> | 2013-07-31 16:55:26 +0800 |
---|---|---|
committer | Bruce Griffith <Bruce.Griffith@se-eng.com> | 2013-10-15 05:01:11 +0200 |
commit | 7b6d412dbc4e5c11d3dd7890abf0edf279b3f504 (patch) | |
tree | 9d41c0b6299cab6a90616fdbc3e31d6ef67797c6 /src/vendorcode/amd/agesa/f16kb/Legacy | |
parent | f8bf5a10c599ef071998bbc3f16e9e3d7fcdb6eb (diff) |
vendorcode/amd/agesa/f16kb: Update Kabini PI from v1.0.0.0 to v1.0.0.7
The platform initialization (PI) code v1.0.0.7 for Kabini has some
enhancements like ECC DIMM support, new CPU microcode rev 0700010B, FCH
bug fix (RTC) and so on.
Use the name Kabini instead of Kerala everywhere.
Note, the former PI code was indeed version v1.0.0.0 instead of v0.0.1.0
as used in `AGESA_VERSION_STRING`.
Change-Id: I186de1aef222cd35ea69efa93967a3ffb8da7248
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3935
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/Legacy')
-rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Legacy/PlatformMemoryConfiguration.inc | 2 | ||||
-rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Legacy/agesa.inc | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Legacy/PlatformMemoryConfiguration.inc b/src/vendorcode/amd/agesa/f16kb/Legacy/PlatformMemoryConfiguration.inc index d75d04f47f..872f973585 100644 --- a/src/vendorcode/amd/agesa/f16kb/Legacy/PlatformMemoryConfiguration.inc +++ b/src/vendorcode/amd/agesa/f16kb/Legacy/PlatformMemoryConfiguration.inc @@ -444,7 +444,7 @@ MEMORY_POWER_POLICY_OVERRIDE MACRO PowerPolicy:REQ DB PowerPolicy ENDM -MOTHER_RBOARD_LAYERS MACRO Layers:REQ +MOTHER_BOARD_LAYERS MACRO Layers:REQ DB PSO_MOTHER_BOARD_LAYERS DB 1 DB Layers diff --git a/src/vendorcode/amd/agesa/f16kb/Legacy/agesa.inc b/src/vendorcode/amd/agesa/f16kb/Legacy/agesa.inc index 010db877d4..7683b15596 100644 --- a/src/vendorcode/amd/agesa/f16kb/Legacy/agesa.inc +++ b/src/vendorcode/amd/agesa/f16kb/Legacy/agesa.inc @@ -2453,6 +2453,7 @@ FCH_PLATFORM_POLICY STRUCT CfgFchSciMapControl POINTER ? ; FCH SCI Mapping Control CfgFchSataPhyControl POINTER ? ; FCH SATA PHY Control CfgFchGpioControl POINTER ? ; FCH GPIO Control + CfgFchRtcWorkaround BOOLEAN ? ; FCH RTC Workaround FCH_PLATFORM_POLICY ENDS |