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| author | Werner Zeh <werner.zeh@siemens.com> | 2018-11-21 12:38:59 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-23 11:28:31 +0000 |
| commit | 697faf0d5fa1e4a8c221f083ab4b469d4a4b57d2 (patch) | |
| tree | 90ab717ba717a153e66964f5cbd3283357e935f7 /src/superio/winbond/w83667hg-a | |
| parent | 26361862bdff9bc12c31e4f153e83422e21179b6 (diff) | |
siemens/mc_apl4: Set CPU clock to minimum ratio
The power budget for this mainboard is very limited while the
performance demand is low. Set the CPU clock to the lowest value to
enable maximum efficiency and thus lowest power dissipation.
Change-Id: I23c7c5393deb676b94f2b0ac25e21a7a44cd8cb3
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/superio/winbond/w83667hg-a')
0 files changed, 0 insertions, 0 deletions