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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-09 20:26:25 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-10-27 12:50:33 +0100
commit85836c2215498ff18746b3a7e85ed684cf2e119e (patch)
tree1b774a8f00fda2e0ccc1939105e5f4f2c7c8abe3 /src/superio/smsc
parent377fd754932922e8c907994ef3e4d8ab925c6132 (diff)
superio: Use 'pnp_devfn_t' over 'device_t' in romstage component
The romstage component of Super I/O support is in fact written around passing a lower and upper half packed integer. We currently have two typedef's for this, 'device_t' and 'pnp_devfn_t'. We wish to make use of 'pnp_devfn_t' over 'device_t' as 'device_t' changes it's typedef in the ramstage context and so is really a conflicting definition. This helps solve problems down the road to having the 'real' 'device_t' definition usable in romstage later. This follows on from the rational given in: c2956e7 device/pci_early.c: Mixes up variants of a typedefs to 'u32' Change-Id: Ia9f238ebb944f9fe7b274621ee0c09a6de288a76 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6231 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/superio/smsc')
-rw-r--r--src/superio/smsc/fdc37m60x/early_serial.c2
-rw-r--r--src/superio/smsc/kbc1100/early_init.c8
-rw-r--r--src/superio/smsc/kbc1100/kbc1100.h2
-rw-r--r--src/superio/smsc/lpc47b272/early_serial.c6
-rw-r--r--src/superio/smsc/lpc47b397/early_serial.c6
-rw-r--r--src/superio/smsc/lpc47m10x/early_serial.c6
-rw-r--r--src/superio/smsc/lpc47m15x/early_serial.c6
-rw-r--r--src/superio/smsc/lpc47m15x/lpc47m15x.h2
-rw-r--r--src/superio/smsc/lpc47n217/early_serial.c10
-rw-r--r--src/superio/smsc/lpc47n227/early_serial.c10
-rw-r--r--src/superio/smsc/sch4037/sch4037_early_init.c6
-rw-r--r--src/superio/smsc/sio1036/sio1036.h2
-rw-r--r--src/superio/smsc/sio1036/sio1036_early_init.c8
-rw-r--r--src/superio/smsc/smscsuperio/early_serial.c6
-rw-r--r--src/superio/smsc/smscsuperio/smscsuperio.h2
15 files changed, 41 insertions, 41 deletions
diff --git a/src/superio/smsc/fdc37m60x/early_serial.c b/src/superio/smsc/fdc37m60x/early_serial.c
index 38cb0f8f27..80258a91d1 100644
--- a/src/superio/smsc/fdc37m60x/early_serial.c
+++ b/src/superio/smsc/fdc37m60x/early_serial.c
@@ -46,7 +46,7 @@ static void fdc37m60x_sio_write(uint8_t ldn, u8 index, u8 value)
}
/* Enable the peripheral devices on the FDC37M60X Super I/O chip. */
-static void fdc37m60x_enable_serial(device_t dev, u16 iobase)
+static void fdc37m60x_enable_serial(pnp_devfn_t dev, u16 iobase)
{
/* (1) Enter the configuration state. */
outb(0x55, FDC37M60X_CONFIGURATION_PORT);
diff --git a/src/superio/smsc/kbc1100/early_init.c b/src/superio/smsc/kbc1100/early_init.c
index d075f9c2f7..bd42288184 100644
--- a/src/superio/smsc/kbc1100/early_init.c
+++ b/src/superio/smsc/kbc1100/early_init.c
@@ -26,19 +26,19 @@
#include "kbc1100.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
}
-void kbc1100_early_serial(device_t dev, u16 iobase)
+void kbc1100_early_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
@@ -50,7 +50,7 @@ void kbc1100_early_serial(device_t dev, u16 iobase)
void kbc1100_early_init(u16 port)
{
- device_t dev;
+ pnp_devfn_t dev;
dev = PNP_DEV (port, KBC1100_KBC);
pnp_enter_conf_state(dev);
diff --git a/src/superio/smsc/kbc1100/kbc1100.h b/src/superio/smsc/kbc1100/kbc1100.h
index 2b588f9c91..ec24dd3f9f 100644
--- a/src/superio/smsc/kbc1100/kbc1100.h
+++ b/src/superio/smsc/kbc1100/kbc1100.h
@@ -36,7 +36,7 @@
#define KBC1100_EC1 0x0D /* EC Channel 1 */
#define KBC1100_EC2 0x0E /* EC Channel 2 */
-void kbc1100_early_serial(device_t dev, u16 iobase);
+void kbc1100_early_serial(pnp_devfn_t dev, u16 iobase);
void kbc1100_early_init(u16 port);
#endif /* SUPERIO_SMSC_KBC1100_H */
diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c
index b2f0d1b724..3624df272f 100644
--- a/src/superio/smsc/lpc47b272/early_serial.c
+++ b/src/superio/smsc/lpc47b272/early_serial.c
@@ -23,13 +23,13 @@
#include <arch/io.h>
#include "lpc47b272.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
@@ -42,7 +42,7 @@ static void pnp_exit_conf_state(device_t dev)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Processor I/O port address to assign to this serial device.
*/
-static void lpc47b272_enable_serial(device_t dev, u16 iobase)
+static void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47b397/early_serial.c b/src/superio/smsc/lpc47b397/early_serial.c
index 31d515b5c0..953cd4bbb1 100644
--- a/src/superio/smsc/lpc47b397/early_serial.c
+++ b/src/superio/smsc/lpc47b397/early_serial.c
@@ -23,19 +23,19 @@
#include <arch/io.h>
#include "lpc47b397.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
}
-static void lpc47b397_enable_serial(device_t dev, u16 iobase)
+static void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c
index fc6efb91d8..1174120136 100644
--- a/src/superio/smsc/lpc47m10x/early_serial.c
+++ b/src/superio/smsc/lpc47m10x/early_serial.c
@@ -21,13 +21,13 @@
#include <arch/io.h>
#include "lpc47m10x.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
@@ -40,7 +40,7 @@ static void pnp_exit_conf_state(device_t dev)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Processor I/O port address to assign to this serial device.
*/
-static void lpc47m10x_enable_serial(device_t dev, u16 iobase)
+static void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47m15x/early_serial.c b/src/superio/smsc/lpc47m15x/early_serial.c
index 5686f52106..0a42ad3206 100644
--- a/src/superio/smsc/lpc47m15x/early_serial.c
+++ b/src/superio/smsc/lpc47m15x/early_serial.c
@@ -25,19 +25,19 @@
#include "lpc47m15x.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
}
-void lpc47m15x_enable_serial(device_t dev, u16 iobase)
+void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47m15x/lpc47m15x.h b/src/superio/smsc/lpc47m15x/lpc47m15x.h
index 32cff48f01..ee9e9c675a 100644
--- a/src/superio/smsc/lpc47m15x/lpc47m15x.h
+++ b/src/superio/smsc/lpc47m15x/lpc47m15x.h
@@ -34,6 +34,6 @@
#include <arch/io.h>
#include <stdint.h>
-void lpc47m15x_enable_serial(device_t dev, u16 iobase);
+void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_SMSC_LPC47M15X_H */
diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c
index 451628a449..7405f3296c 100644
--- a/src/superio/smsc/lpc47n217/early_serial.c
+++ b/src/superio/smsc/lpc47n217/early_serial.c
@@ -24,13 +24,13 @@
#include <assert.h>
#include "lpc47n217.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
@@ -42,7 +42,7 @@ static void pnp_exit_conf_state(device_t dev)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Base I/O port for the logical device.
*/
-static void lpc47n217_pnp_set_iobase(device_t dev, u16 iobase)
+static void lpc47n217_pnp_set_iobase(pnp_devfn_t dev, u16 iobase)
{
/* LPC47N217 requires base ports to be a multiple of 4. */
ASSERT(!(iobase & 0x3));
@@ -74,7 +74,7 @@ static void lpc47n217_pnp_set_iobase(device_t dev, u16 iobase)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param enable 0 to disable, anythig else to enable.
*/
-static void lpc47n217_pnp_set_enable(device_t dev, int enable)
+static void lpc47n217_pnp_set_enable(pnp_devfn_t dev, int enable)
{
u8 power_register = 0, power_mask = 0, current_power, new_power;
@@ -109,7 +109,7 @@ static void lpc47n217_pnp_set_enable(device_t dev, int enable)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Processor I/O port address to assign to this serial device.
*/
-static void lpc47n217_enable_serial(device_t dev, u16 iobase)
+static void lpc47n217_enable_serial(pnp_devfn_t dev, u16 iobase)
{
/*
* NOTE: Cannot use pnp_set_XXX() here because they assume chip
diff --git a/src/superio/smsc/lpc47n227/early_serial.c b/src/superio/smsc/lpc47n227/early_serial.c
index 4aea7c57fc..64a6d84a2c 100644
--- a/src/superio/smsc/lpc47n227/early_serial.c
+++ b/src/superio/smsc/lpc47n227/early_serial.c
@@ -23,13 +23,13 @@
#include <arch/io.h>
#include "lpc47n227.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
@@ -41,7 +41,7 @@ static void pnp_exit_conf_state(device_t dev)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Base I/O port for the logical device.
*/
-static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
+static void lpc47n227_pnp_set_iobase(pnp_devfn_t dev, u16 iobase)
{
/* LPC47N227 requires base ports to be a multiple of 4. */
/* it's not very useful to do an ASSERT here: if it trips,
@@ -76,7 +76,7 @@ static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param enable 0 to disable, anythig else to enable.
*/
-static void lpc47n227_pnp_set_enable(device_t dev, int enable)
+static void lpc47n227_pnp_set_enable(pnp_devfn_t dev, int enable)
{
u8 power_register = 0, power_mask = 0, current_power, new_power;
@@ -111,7 +111,7 @@ static void lpc47n227_pnp_set_enable(device_t dev, int enable)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Processor I/O port address to assign to this serial device.
*/
-static void lpc47n227_enable_serial(device_t dev, u16 iobase)
+static void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase)
{
/*
* NOTE: Cannot use pnp_set_XXX() here because they assume chip
diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c
index 099e5f27c6..56af87aafc 100644
--- a/src/superio/smsc/sch4037/sch4037_early_init.c
+++ b/src/superio/smsc/sch4037/sch4037_early_init.c
@@ -24,13 +24,13 @@
#include "sch4037.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
unsigned port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
unsigned port = dev >> 8;
outb(0xaa, port);
@@ -38,7 +38,7 @@ static void pnp_exit_conf_state(device_t dev)
void sch4037_early_init(unsigned port)
{
- device_t dev;
+ pnp_devfn_t dev;
dev = PNP_DEV(port, SMSCSUPERIO_SP1);
pnp_enter_conf_state(dev);
diff --git a/src/superio/smsc/sio1036/sio1036.h b/src/superio/smsc/sio1036/sio1036.h
index fa52a1a5c8..ba7a9327fc 100644
--- a/src/superio/smsc/sio1036/sio1036.h
+++ b/src/superio/smsc/sio1036/sio1036.h
@@ -29,6 +29,6 @@
#include <arch/io.h>
#include <stdint.h>
-void sio1036_enable_serial(device_t dev, u16 iobase);
+void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_SMSC_1306_H */
diff --git a/src/superio/smsc/sio1036/sio1036_early_init.c b/src/superio/smsc/sio1036/sio1036_early_init.c
index 5f10230c84..b37e81b974 100644
--- a/src/superio/smsc/sio1036/sio1036_early_init.c
+++ b/src/superio/smsc/sio1036/sio1036_early_init.c
@@ -24,13 +24,13 @@
#include "sio1036.h"
-static inline void sio1036_enter_conf_state(device_t dev)
+static inline void sio1036_enter_conf_state(pnp_devfn_t dev)
{
unsigned port = dev >> 8;
outb(0x55, port);
}
-static inline void sio1036_exit_conf_state(device_t dev)
+static inline void sio1036_exit_conf_state(pnp_devfn_t dev)
{
unsigned port = dev >> 8;
outb(0xaa, port);
@@ -39,7 +39,7 @@ static inline void sio1036_exit_conf_state(device_t dev)
/* Detect SMSC SIO1036 LPC Debug Card status */
static u8 detect_sio1036_chip(unsigned port)
{
- device_t dev = PNP_DEV(port, SIO1036_SP1);
+ pnp_devfn_t dev = PNP_DEV(port, SIO1036_SP1);
unsigned data;
sio1036_enter_conf_state (dev);
@@ -56,7 +56,7 @@ static u8 detect_sio1036_chip(unsigned port)
};
}
-void sio1036_enable_serial(device_t dev, u16 iobase)
+void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase)
{
unsigned port = dev >> 8;
diff --git a/src/superio/smsc/smscsuperio/early_serial.c b/src/superio/smsc/smscsuperio/early_serial.c
index e2eea6d719..c058ef5089 100644
--- a/src/superio/smsc/smscsuperio/early_serial.c
+++ b/src/superio/smsc/smscsuperio/early_serial.c
@@ -29,14 +29,14 @@
#define SMSC_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev. */
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(SMSC_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(SMSC_EXIT_KEY, port);
@@ -49,7 +49,7 @@ static void pnp_exit_conf_state(device_t dev)
* @param dev The device to use.
* @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
*/
-void smscsuperio_enable_serial(device_t dev, u16 iobase)
+void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/smscsuperio/smscsuperio.h b/src/superio/smsc/smscsuperio/smscsuperio.h
index 60a58e68bc..8a761ba1f1 100644
--- a/src/superio/smsc/smscsuperio/smscsuperio.h
+++ b/src/superio/smsc/smscsuperio/smscsuperio.h
@@ -30,6 +30,6 @@
#define SMSCSUPERIO_SP1 4 /* Com1 */
#define SMSCSUPERIO_SP2 5 /* Com2 */
-void smscsuperio_enable_serial(device_t dev, u16 iobase);
+void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_SMSC_SMSCSUPERIO_H */