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author | Felix Held <felix-coreboot@felixheld.de> | 2024-07-12 19:56:00 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-07-15 18:07:53 +0000 |
commit | 4affdcea86fddb05b59cd8eda9183dc5ee1ee8bb (patch) | |
tree | 69d8494fbd42adf75f9b2eff998bb253ab1999d5 /src/superio/nuvoton | |
parent | 524fc52bdd0d28021484b71f321e7a511fe37cc6 (diff) |
soc/amd/glinda/include/gpio: update to match hardware
The table "IOMUX Functional Table" in PPR #57254 rev. 1.60 was used as a
reference. This should fix the ESPI_ALERT_D1 IOMUX setting for the
boards using the Glinda SoC which previously didn't match the hardware.
Compared to Phoenix, Glinda has two more chip select outputs for the
SPI2 controller and an additional ZST_STUTTER_RAIL IOMUX function.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id9adfbe0c7aee90d6fe990f239d82a1d013e7f5f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83437
Reviewed-by: Anand Vaikar <a.vaikar2021@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/superio/nuvoton')
0 files changed, 0 insertions, 0 deletions