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author | Felix Held <felix-coreboot@felixheld.de> | 2022-05-06 17:50:07 +0200 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-05-12 18:44:11 +0000 |
commit | 68aaa8cc26026225179547c44dfb39d8ac775da4 (patch) | |
tree | 4e7f8bb8a76e874a5e9ad03c78d89258101b09da /src/superio/ite | |
parent | 3dc89c5bd73ad1e236952f27421678e7fef24225 (diff) |
soc/amd/sabrina/fsp_m_params: don't hard-code USB PHY config table size
Use sizeof instead of having a hard-coded struct length.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3c39d770a7719e30572e71b6a6c24fa2ad4a9426
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/superio/ite')
0 files changed, 0 insertions, 0 deletions