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authorFurquan Shaikh <furquan@chromium.org>2018-01-26 11:55:06 -0800
committerFurquan Shaikh <furquan@google.com>2018-01-30 20:20:43 +0000
commitcb58683ef581708fd256b875e05ed7263f867ab1 (patch)
treed855adba8503ad7e549e617cdf96658833db374f /src/southbridge
parentc96ad868d4ad869523b615d90fb0bea4bd6d4ef6 (diff)
soc/intel/skylake: Add support for mode-aware DPTF
This change adds support for: 1. Handling thermal trip points change event handler based on device mode. 2. Returning thermal trip point temperatures based on the device mode. BUG=b:72554519 Change-Id: Ife48af76ceb7a39abd1fac8ef1f77db7e65ab43e Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/23462 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
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