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| author | Mike Banon <mikebdp2@gmail.com> | 2019-01-15 03:03:16 +0300 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2019-01-16 00:20:29 +0000 |
| commit | 90af720d4e7e6f6d8e3f9fe55e9de0b59abb403d (patch) | |
| tree | fad20d0c0988226bc013a16bc19cc2c1df9334a7 /src/southbridge | |
| parent | 1e2676bf1bd0c2c0083239f29164048eb7645496 (diff) | |
drivers/spi/sst.c: Add three remaining SST25*F080 chips
Required for ACPI S3 suspend support at some motherboards.
Synchronizing with flashchips.c/h flashrom source code.
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: Idc63665937ab1bfdf15c4054001daa288bfdd47b
Reviewed-on: https://review.coreboot.org/c/30927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions