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authorBora Guvendik <bora.guvendik@intel.com>2016-04-04 17:53:21 -0700
committerAaron Durbin <adurbin@chromium.org>2016-04-13 16:08:38 +0200
commit399332d2710137d4a5ca1b9cc2b0416a5291949c (patch)
tree10dc81ebc61720dc5d8a59cbb65e7c90091d51b9 /src/southbridge/sis/sis966/pcie.c
parente07e13d7fdb52bdec6c23a65d96f8be718649c8b (diff)
soc/intel/apollolake: Enable TPM in bootblock stage
Configure gpio FST_SPI_CS2_N before verstage so that tpm can be accessed. Change-Id: I238bf1cd508880b686f0625f28175a80de450971 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/14254 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/sis/sis966/pcie.c')
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