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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-23 20:00:16 +0300
committerFelix Held <felix-coreboot@felixheld.de>2019-01-06 13:10:27 +0000
commita144e4d6fa93b9ba129b3aa8991cc5fb2ec3c8a6 (patch)
tree32c23066cb4ab18a20c6c7c71395a709c01d0130 /src/southbridge/nvidia/mcp55
parente7377556cc33b10fdba6d956ac83d823478f5eb4 (diff)
device: Use pcidev_path_behind()
Change-Id: Iac16f9412d0e6aac908d873c61a4de3935e5318a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/26518 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/nvidia/mcp55')
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/nvidia/mcp55/mcp55.c b/src/southbridge/nvidia/mcp55/mcp55.c
index 551da8937c..8f0ec8fe77 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.c
+++ b/src/southbridge/nvidia/mcp55/mcp55.c
@@ -30,7 +30,7 @@ static struct device *find_lpc_dev(struct device *dev, unsigned devfn)
{
struct device *lpc_dev;
- lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
+ lpc_dev = pcidev_path_behind(dev->bus, devfn);
if (!lpc_dev)
return lpc_dev;
@@ -158,7 +158,7 @@ void mcp55_enable(struct device *dev)
return;
if (index2 != 0) {
- sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1);
+ sm_dev = pcidev_path_behind(dev->bus, devfn + 1);
if (!sm_dev)
return;
if (sm_dev) {
@@ -187,7 +187,7 @@ void mcp55_enable(struct device *dev)
}
if (index == 16) {
- sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1);
+ sm_dev = pcidev_path_behind(dev->bus, devfn + 1);
if (!sm_dev)
return;
@@ -211,7 +211,7 @@ void mcp55_enable(struct device *dev)
/* NIC1 is the final, we need update final reg to 0xe8. */
if (index == 9) {
- sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1);
+ sm_dev = pcidev_path_behind(dev->bus, devfn + 1);
if (!sm_dev)
return;
reg_old = pci_read_config32(sm_dev, 0xe8);