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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-07 11:38:56 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-21 06:20:02 +0200
commite28bd4ade6f716024afdff0bac48028a42a62e71 (patch)
tree518e4b663acf7e9bd7b09646c4a976e85c765173 /src/southbridge/intel/lynxpoint
parentc8883262cf1375616743ba9d1f259b4fcda20d72 (diff)
timestamps intel: Move timestamp scratchpad to chipset
This retrieves back the value stored with store_initial_timestamp() in the bootblock for southbridge. Change-Id: I377c823706c33ed65af023d20d2e4323edd31199 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3908 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/early_pch.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index a390d737bc..1a78d571e6 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -21,6 +21,7 @@
#include <console/console.h>
#include <arch/io.h>
#include <device/pci_def.h>
+#include <timestamp.h>
#include <elog.h>
#include "pch.h"
@@ -62,6 +63,17 @@ static void pch_generic_setup(void)
printk(BIOS_DEBUG, " done.\n");
}
+#if CONFIG_COLLECT_TIMESTAMPS
+tsc_t get_initial_timestamp(void)
+{
+ tsc_t base_time = {
+ .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc),
+ .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0)
+ };
+ return base_time;
+}
+#endif
+
static int sleep_type_s3(void)
{
u32 pm1_cnt;