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authorJonathan Zhang <jonzhang@fb.com>2020-04-02 20:03:48 -0700
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2020-06-06 07:44:07 +0000
commitb7cf7d36d7cf97b0cce437b9f1577ca39eeb312d (patch)
treed1df2f10fbaf6a582db3c9a8cbd2da5f14f7e09e /src/southbridge/intel/lynxpoint/hda_verb.h
parenteaa219b5bba95cfdc03b9b20d1c06d84bd33c702 (diff)
soc/intel/xeon_sp/cpx: set up cpus
Set up cpus: * setup apic IDs. * setup MSR to enable fast string, speed step, etc. * Enable turbo Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com> Change-Id: I5765e98151f6ceebaabccc06db63d5911caf7ce8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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