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authorFelix Singer <felixsinger@posteo.net>2024-01-12 21:21:06 +0100
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-14 10:15:34 +0000
commitf4842bbc145da72c37321fed876b3140f79c6aa7 (patch)
treea62832fe92d0e5904a86837d22a041a5f49d49d4 /src/southbridge/intel/i82801jx/chip.h
parentd04378118d17abaf82cf03a9fd4abcfeb917badc (diff)
sb/intel: Use boolean for pcie_hotplug_map attribute
Change-Id: Ia5e1ee683fa3d8d216ece26426e9870981ede2ba Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79932 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx/chip.h')
-rw-r--r--src/southbridge/intel/i82801jx/chip.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index ae31d4f224..f12a67e877 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -3,6 +3,7 @@
#ifndef SOUTHBRIDGE_INTEL_I82801JX_CHIP_H
#define SOUTHBRIDGE_INTEL_I82801JX_CHIP_H
+#include <stdbool.h>
#include <stdint.h>
enum {
@@ -59,7 +60,7 @@ struct southbridge_intel_i82801jx_config {
uint8_t scale : 2;
} pcie_power_limits[6];
- uint8_t pcie_hotplug_map[8];
+ bool pcie_hotplug_map[8];
/* Additional LPC IO decode ranges */
uint32_t gen1_dec;