diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-28 16:33:33 +0300 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-01-10 11:15:10 +0000 |
| commit | 3139c8dc05a363810b4dd9c45f01667760e22a58 (patch) | |
| tree | 76223cd373d4b1dd8c94efcaef3fc2ad13cb6546 /src/southbridge/intel/i82801dx | |
| parent | fb777b5da8ea7426cf8e9af2876a724c1f067ba9 (diff) | |
ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations
Allocation now happens prior to device enumeration. The
step cbmem_add() is a no-op here, if reached for some
boards. The memset() here is also redundant and becomes
harmful with followup works, as it would wipe out the
CBMEM console and ChromeOS related fields without them
being set again.
Change-Id: I9b2625af15cae90b9c1eb601e606d0430336609f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48701
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801dx')
| -rw-r--r-- | src/southbridge/intel/i82801dx/fadt.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index 84ea73ad9c..66aa3f1ba9 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -2,6 +2,7 @@ #include <device/pci_ops.h> #include <acpi/acpi.h> +#include <acpi/acpi_gnvs.h> #include <version.h> /* FIXME: This needs to go into a separate .h file @@ -79,3 +80,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.addrl = pmbase + 0x28; fadt->x_gpe0_blk.addrh = 0x0; } + +size_t gnvs_size_of_array(void) +{ + return 0; +} |