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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-01-18 04:25:48 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-11-28 10:05:28 +0000 |
| commit | 560c3f5ccfff0fc289bb46f1b1b6c4236817590a (patch) | |
| tree | 59906cc1926d7e643dd1ec95022c87228560f152 /src/southbridge/intel/i82801dx/i82801dx.h | |
| parent | 0c745347d09e08d9cf388600558ea41634e5cbcd (diff) | |
aopen/dxplplusu: Support SMM_ASEG and SMM_TSEG
Both SMM_ASEG and SMM_TSEG choices work.
There is periodic TCO timeout occurring.
At least with DEBUG_SMI kernel reports low memory corruption.
Change-Id: If20a7092117612a1a9e25eb6ac480e105acd57d7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82801dx/i82801dx.h')
| -rw-r--r-- | src/southbridge/intel/i82801dx/i82801dx.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index ecb992471e..4c1366e8c5 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -140,8 +140,8 @@ void i82801dx_lpc_setup(void); #define DEVACT_STS 0x44 #define SS_CNT 0x50 -#define TCOBASE 0x60 /* TCO Base Address Register */ -#define TCO1_CNT 0x08 /* TCO1 Control Register */ +/* TCO1 Control Register */ +#define TCO1_CNT 0x68 #define GEN_PMCON_1 0xa0 #define GEN_PMCON_2 0xa2 |