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authorArthur Heymans <arthur@aheymans.xyz>2022-11-01 23:26:07 +0100
committerArthur Heymans <arthur@aheymans.xyz>2022-11-07 13:57:22 +0000
commiteb76a455cd39ec59b7f2ba28baeec9538befd59e (patch)
tree51bd8418d5bf9e130c7ccbc8a9c94a5689d8bbbd /src/southbridge/intel/i82801dx/bootblock.c
parent6baee3d28729d4b924e8f793c4c7311cebf1f80a (diff)
mb/aopen/dxplplusu: Remove board
This board use the LEGACY_SMP_INIT which is to be deprecated after release 4.18. Change-Id: Idf37ade31ddb55697df1a65062c092a0a485e175 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69114 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801dx/bootblock.c')
-rw-r--r--src/southbridge/intel/i82801dx/bootblock.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
deleted file mode 100644
index 6cda0a87a4..0000000000
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <arch/bootblock.h>
-#include <device/pci_ops.h>
-
-void bootblock_early_southbridge_init(void)
-{
- /* Set FWH IDs for 2 MB flash part. */
- if (CONFIG_ROM_SIZE == 0x200000)
- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xe8, 0x00001111);
-}