summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/fsp_bd82x6x/sata.c
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2015-12-04 08:36:49 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-12-06 22:20:56 +0100
commit533f6668a429d61be3a2c141603480d5fb2cd4a4 (patch)
tree7443a46088422faa57f04faf9607074de4202fd4 /src/southbridge/intel/fsp_bd82x6x/sata.c
parent0eae36486a8d96d9945de459ec8161f14df60edf (diff)
MAINTAINERS: Designate Intel maintainers for FSP 1.1
After several internal discussions, teams at Intel with stakes in coreboot have decided to each assign one or more maintainers. These maintainers can be expected to provide a point of contact for assistance with technical (code-related) issues, testing on real hardware, and making sure that their FSP-related areas continue to function with upstream coreboot. They understand that the inclusion of their information in the MAINTAINERS file does not give them any extra power over their areas. At the same time, nobody expects any community process to change. The one expectation is that reasonable efforts be made to contact these maintainers when making fundamental changes to their areas, or when discussing code removal. Change-Id: I1aa135838984973f648dec5dbb35ff73992e9289 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12644 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src/southbridge/intel/fsp_bd82x6x/sata.c')
0 files changed, 0 insertions, 0 deletions