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authorAngel Pons <th3fanbus@gmail.com>2020-06-01 22:23:57 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-21 18:23:54 +0000
commit7a2cb35262bedec9e6470bf7fbebf9256e855cff (patch)
tree0652f3c41ec3fc694138aa812613b682eb00d793 /src/southbridge/intel/common
parent53a343e65b2d452c4a88e6c910a4621c3ced660e (diff)
i945/pineview/x4x/i82801gx: Use common code for early SMBus
The early SMBus code for this southbridge checked if the PCI device ID is valid. However, we can't easily do that in common code, and we should not attempt to do so either: if a SMBus device behaves differently, then it should not be using the common code anyway. Since this southbridge is used with two different northbridges, we need to update both of them. Plus, x4x raminit no longer needs to know which southbridge it is paired with, since both i82801gx and i82801jx use the common early SMBus code, so we drop some preprocessor around includes. Change-Id: Ic60a3f89bda6000fbe646461f05240c1b09db6e9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42005 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
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