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authorNico Huber <nico.huber@secunet.com>2019-02-28 12:43:21 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-04-15 20:59:48 +0000
commit56473ca9a7ca96e862897192b2a7dba4f162aa86 (patch)
treedef97400fff9572266c9619c4651541def50c995 /src/southbridge/intel/bd82x6x/pch.h
parent14929253a52cebaedbbe918972ea12568e29dfd9 (diff)
sb/intel/bd82x6x/sata: Clean up IDE modes
Don't set legacy timing values that don't affect the hardware but enable the OOB retry mode as already done on the AHCI path. Change-Id: I0b078d7790ca801a89066ef6a161d900be5eb778 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40010 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
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