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author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-04-01 15:49:57 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-22 08:57:48 +0200 |
commit | 4f332fbd4aeea3eb1cf2b7c8f103e3928430c9bd (patch) | |
tree | 49af0c80cfd7ab1d1bac0616ec80f763c3107405 /src/southbridge/intel/bd82x6x/gpio.h | |
parent | d9af30bec1c5d47f51dcdfbe540ad2fcebb2fdc4 (diff) |
chromeec: lpc: Read / write IO ports through common functions
Rather than calling inb + outb directly, access the ports through common
functions. This is in preparation for alternative access modes required
by certain new embedded controllers.
BUG=chrome-os-partner:38224
TEST=Manual on Samus. Verify system boots cleanly in normal mode.
BRANCH=None
Change-Id: I98783ff67a37d970019683bb589825bc5d68c033
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 25afa3f95183d8cf2e9a35272c77e92fbc6ee030
Original-Change-Id: Ic9d8f7f5c5d392212e39db28ebceea461d46f796
Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/263571
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/9909
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/gpio.h')
0 files changed, 0 insertions, 0 deletions