Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

10 files changed, 34 insertions, 34 deletions

diff --git a/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c b/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
index f83e54b682..ece7e794eb 100644
--- a/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
+++ b/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
@@ -10,8 +10,8 @@
 #include <device/pci_ops.h>
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
-{       
-        pci_write_config32(dev, 0x40, 
+{
+        pci_write_config32(dev, 0x40,
                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c
index 3ac28e59ca..3f92be7dec 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.c
@@ -16,7 +16,7 @@ void bcm5785_enable(device_t dev)
 
 	/* See if we are on the behind the pcix bridge */
 	bus_dev = dev->bus->dev;
-	if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && 
+	if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
 		(bus_dev->device == 0x0036 )) // device under PCI-X Bridge
 	{
 		unsigned devfn;
@@ -34,7 +34,7 @@ void bcm5785_enable(device_t dev)
 	else { // same bus
 		unsigned devfn;
 		devfn = (dev->path.pci.devfn) & ~7;
-		if( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) { 
+		if( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) {
 			if(dev->device == 0x0036) //PCI-X Bridge
 			{ devfn += (1<<3); }
 			else if(dev->device == 0x0223) // USB
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
index fd2f3ed114..d448bf67c3 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
@@ -85,7 +85,7 @@ static unsigned get_sbdn(unsigned bus)
 
 static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
 {
-	//ACPI Decode Enable	
+	//ACPI Decode Enable
 	outb(0x0e, 0xcd6);
 	outb((1<<3), 0xcd7);
 
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
index 2638e97d5c..a55ddd82e8 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
@@ -15,11 +15,11 @@ static void enable_smbus(void)
 	if (dev == PCI_DEV_INVALID) {
 		die("SMBUS controller not found\n");
 	}
-	
+
 	print_debug("SMBus controller enabled\n");
 	/* set smbus iobase */
 	pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1);
-	/* Set smbus iospace enable */ 
+	/* Set smbus iospace enable */
 	pci_write_config8(dev, 0xd2, 0x03);
 	/* clear any lingering errors, so the transaction will run */
 	outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
index e76dd3a45a..29c08ab74e 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
@@ -52,25 +52,25 @@ static void bcm5785_lpc_read_resources(device_t dev)
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 
-/**     
+/**
  * @brief Enable resources for children devices
- *      
+ *
  * @param dev the device whos children's resources are to be enabled
- *      
+ *
  * This function is call by the global enable_resources() indirectly via the
  * device_operation::enable_resources() method of devices.
- *      
+ *
  * Indirect mutual recursion:
  *      enable_childrens_resources() -> enable_resources()
  *      enable_resources() -> device_operation::enable_resources()
  *      device_operation::enable_resources() -> enable_children_resources()
- */     
+ */
 static void bcm5785_lpc_enable_childrens_resources(device_t dev)
-{       
-        unsigned link; 
+{
+        unsigned link;
 	uint32_t reg;
 	int i;
-	
+
 	reg = pci_read_config8(dev, 0x44);
 
         for (link = 0; link < dev->links; link++) {
@@ -93,10 +93,10 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
 					case 0x3f8: // COM1
 						reg |= (1<<6); 	break;
 					case 0x2f8: // COM2
-						reg |= (1<<7);  break; 
+						reg |= (1<<7);  break;
 					case 0x378: // Parallal 1
 						reg |= (1<<0); break;
-					case 0x3f0: // FD0 
+					case 0x3f0: // FD0
 						reg |= (1<<26); break;
 					case 0x220:  // Aduio 0
 						reg |= (1<<14);	break;
@@ -108,7 +108,7 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
                 }
         }
 	pci_write_config32(dev, 0x44, reg);
-	
+
 
 }
 
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
index ec92ecf7e9..58d5ff5bb7 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
@@ -44,7 +44,7 @@ static void sata_init(struct device *dev)
 
 		printk(BIOS_DEBUG, "init PHY...\n");
 		for(i=0; i<4; i++) {
-			mmio = res->base + 0x100 * i; 
+			mmio = res->base + 0x100 * i;
 			byte = read8(mmio + 0x40);
 			printk(BIOS_DEBUG, "port %d PHY status = %02x\n", i, byte);
 			if(byte & 0x4) {// bit 2 is set
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c b/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
index a13e9f3fd0..4f518b6a54 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
@@ -30,7 +30,7 @@ static void sb_init(device_t dev)
 	byte_old = byte;
 	nmi_option = NMI_OFF;
 	get_option(&nmi_option, "nmi");
-	if (nmi_option) {			
+	if (nmi_option) {
 		byte &= ~(1 << 7); /* set NMI */
 	} else {
 		byte |= ( 1 << 7); // Can not mask NMI from PCI-E and NMI_NOW
@@ -47,16 +47,16 @@ static void bcm5785_sb_read_resources(device_t dev)
 	struct resource *res;
 
 	/* Get the normal pci resources of this device */
-	pci_dev_read_resources(dev); 		
-	/* Get Resource for SMBUS */	
-	pci_get_resource(dev, 0x90);	
+	pci_dev_read_resources(dev);
+	/* Get Resource for SMBUS */
+	pci_get_resource(dev, 0x90);
 
-	compact_resources(dev);	
+	compact_resources(dev);
 
         /* Add an extra subtractive resource for both memory and I/O */
         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-        
+
         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
@@ -75,7 +75,7 @@ static int lsmbus_recv_byte(device_t dev)
 
         return do_smbus_recv_byte(res->base, device);
 }
-        
+
 static int lsmbus_send_byte(device_t dev, uint8_t val)
 {
         unsigned device;
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h b/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h
index 5f2f7717a0..e71bb5cbee 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h
@@ -19,7 +19,7 @@
 #define SMBSLVDAT 0xc
 
 
-/* Between 1-10 seconds, We should never timeout normally 
+/* Between 1-10 seconds, We should never timeout normally
  * Longer than this is just painful when a timeout condition occurs.
  */
 #define SMBUS_TIMEOUT (100*1000*10)
@@ -36,7 +36,7 @@ static int smbus_wait_until_ready(unsigned smbus_io_base)
 	do {
 		unsigned char val;
 		val = inb(smbus_io_base + SMBHSTSTAT);
-		val &= 0x1f; 
+		val &= 0x1f;
 		if (val == 0) { // ready now
 			return 0;
 		}
@@ -51,7 +51,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
 	loops = SMBUS_TIMEOUT;
 	do {
 		unsigned char val;
-		
+
 		val = inb(smbus_io_base + SMBHSTSTAT);
 		val &= 0x1f; // mask off reserved bits
 		if ( val & 0x1c) {
@@ -68,7 +68,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
 static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
 {
 	uint8_t byte;
-	
+
         if (smbus_wait_until_ready(smbus_io_base) < 0) {
                 return -2; // not ready
         }
@@ -128,7 +128,7 @@ static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned
 	if (smbus_wait_until_ready(smbus_io_base) < 0) {
 		return -2; // not ready
 	}
-	
+
 	/* set the command/address... */
 	outb(address & 0xff, smbus_io_base + SMBHSTCMD);
 
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_usb.c b/src/southbridge/broadcom/bcm5785/bcm5785_usb.c
index c2e7366272..15295d8329 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_usb.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_usb.c
@@ -23,8 +23,8 @@ static void usb_init(struct device *dev)
 }
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
-{       
-        pci_write_config32(dev, 0x40, 
+{
+        pci_write_config32(dev, 0x40,
                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/broadcom/bcm5785/chip.h b/src/southbridge/broadcom/bcm5785/chip.h
index 4aa2ce3217..3106f60c24 100644
--- a/src/southbridge/broadcom/bcm5785/chip.h
+++ b/src/southbridge/broadcom/bcm5785/chip.h
@@ -1,7 +1,7 @@
 #ifndef BCM5785_CHIP_H
 #define BCM5785_CHIP_H
 
-struct southbridge_broadcom_bcm5785_config 
+struct southbridge_broadcom_bcm5785_config
 {
         unsigned int ide0_enable : 1;
         unsigned int ide1_enable : 1;