diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-10 09:05:30 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-14 19:08:34 +0000 |
| commit | 3d3152eec7efe9bf02499c42b92b4ad22bd7fd4e (patch) | |
| tree | d8c4c0677fdd43274cc3511645e6a309823970d9 /src/southbridge/amd | |
| parent | bbd237702a0e6cc63d88308c6e164451f87300b4 (diff) | |
AGESA: Drop CONFIG_CBB and CONFIG_CDB
Static values, copy paste from multi-node fam15 code.
Add header that shall have declarations of functions
common to different families factored out.
Change-Id: I07bc046c74280f49e46793c119d36b87b8789949
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/reset.c | 5 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb900/reset.c | 5 |
2 files changed, 6 insertions, 4 deletions
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c index b7ee613428..db0aebb9ee 100644 --- a/src/southbridge/amd/cimx/sb800/reset.c +++ b/src/southbridge/amd/cimx/sb800/reset.c @@ -23,7 +23,8 @@ #define HT_INIT_CONTROL 0x6C #define HTIC_BIOSR_Detect (1<<5) -#define NODE_PCI(x, fn) (((CONFIG_CDB+x)<32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) +#define DEV_CDB 0x18 +#define NODE_PCI(x, fn) (((DEV_CDB+x)<32)?(PCI_DEV(0,(DEV_CDB+x),fn)):(PCI_DEV((0-1),(DEV_CDB+x-32),fn))) void cf9_reset_prepare(void) { @@ -32,7 +33,7 @@ void cf9_reset_prepare(void) pci_devfn_t dev; int i; - nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1; + nodes = ((pci_read_config32(PCI_DEV(0, DEV_CDB, 0), 0x60) >> 4) & 7) + 1; for (i = 0; i < nodes; i++) { dev = NODE_PCI(i, 0); htic = pci_read_config32(dev, HT_INIT_CONTROL); diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c index b7ee613428..db0aebb9ee 100644 --- a/src/southbridge/amd/cimx/sb900/reset.c +++ b/src/southbridge/amd/cimx/sb900/reset.c @@ -23,7 +23,8 @@ #define HT_INIT_CONTROL 0x6C #define HTIC_BIOSR_Detect (1<<5) -#define NODE_PCI(x, fn) (((CONFIG_CDB+x)<32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) +#define DEV_CDB 0x18 +#define NODE_PCI(x, fn) (((DEV_CDB+x)<32)?(PCI_DEV(0,(DEV_CDB+x),fn)):(PCI_DEV((0-1),(DEV_CDB+x-32),fn))) void cf9_reset_prepare(void) { @@ -32,7 +33,7 @@ void cf9_reset_prepare(void) pci_devfn_t dev; int i; - nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1; + nodes = ((pci_read_config32(PCI_DEV(0, DEV_CDB, 0), 0x60) >> 4) & 7) + 1; for (i = 0; i < nodes; i++) { dev = NODE_PCI(i, 0); htic = pci_read_config32(dev, HT_INIT_CONTROL); |