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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-25 11:21:02 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-02 04:46:29 +0000 |
| commit | 28c4d2f7e03f0f989bee9fba9b6268611b3f07e6 (patch) | |
| tree | 0a1a36aa595936c44d79645612dfee2cb0a93547 /src/southbridge/amd | |
| parent | c7dcec6a1bd082513161fd2966da41a23beebcc6 (diff) | |
AGESA: Introduce AGESA_LEGACY_WRAPPER and its counterpart
We define AGESA_LEGACY_WRAPPER a method of calling AGESA
via functions in agesawrapper.c file. The approach implemented
there makes it very inconvenient to do board-specific
customisation or present common platform-specific features.
Seems like it also causes assertion errors on AGESA side.
The flag is applied here to all boards and then individually
removed one at a time, as things get tested.
New method is not to call AGESA internal functions directly,
but via the dispatcher. AGESA call parameters are routed to
hooks in both platform and board -directories, to allow for
easy capture or modification as needed.
For each AGESA dispatcher call made, eventlog entries are
replayed to the console log. Also relocations of AGESA heap
that took place are recorded.
New method is expected to be compatible with binaryPI.
Change-Id: Iac3d7f8b0354e9f02c2625576f36fe06b05eb4ce
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 7595889a2f..b1c56cb777 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -10,7 +10,7 @@ ramstage-y += pci.c ramstage-y += pcie.c ramstage-y += sd.c -ramstage-y += agesawrapper.c +ramstage-$(CONFIG_AGESA_LEGACY_WRAPPER) += agesawrapper.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c ramstage-y += reset.c diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 6b3af0ef58..e764ba09fe 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -473,6 +473,7 @@ static void sb800_enable(device_t dev) case (0x16 << 3) | 2: /* 0:16:2 EHCI-USB3 */ sb_config->USBMODE.UsbMode.Ehci3 = dev->enabled; +#if 1 /* FIXME: IS_ENABLED(CONFIG_AGESA_LEGACY_WRAPPER) */ /* call the CIMX entry at the last sb800 device, * so make sure the mainboard devicetree is complete */ @@ -480,6 +481,7 @@ static void sb800_enable(device_t dev) sb_Before_Pci_Init(); else sb_Before_Pci_Restore_Init(); +#endif break; default: |