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| author | Vaibhav Shankar <vaibhav.shankar@intel.com> | 2016-08-26 19:10:21 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-09-14 22:20:18 +0200 |
| commit | db54bb5e3a09126d51fba407b71cdf05e834c71b (patch) | |
| tree | e2c276c9804be084036c902a179bf7e7819f93b5 /src/southbridge/amd/sb600/smbus.h | |
| parent | 7e10c8209ba7a88639da82bd05584dbb9340bb83 (diff) | |
mainboard/intel/amenia: Configure PERST_0 pin
Configure PERST_0 and assign the pin in devicetree.
BUG=chrome-os-partner:55877
TEST=Suspend and resume using 'echo freeze > /sys/power/state'.
System should resume with PCIE and wifi functional.
Change-Id: I39b4d8bba92f352ae121c7552f58480295b48aef
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/16350
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/sb600/smbus.h')
0 files changed, 0 insertions, 0 deletions